Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752115AbdGGJey convert rfc822-to-8bit (ORCPT ); Fri, 7 Jul 2017 05:34:54 -0400 Received: from smtp-out4.electric.net ([192.162.216.184]:60075 "EHLO smtp-out4.electric.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750878AbdGGJew (ORCPT ); Fri, 7 Jul 2017 05:34:52 -0400 From: David Laight To: "'Anatolij Gustschin'" , Lee Jones , Linus Walleij , Alan Tull CC: Moritz Fischer , "linux-gpio@vger.kernel.org" , "linux-fpga@vger.kernel.org" , "linux-usb@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH 3/3] fpga manager: Add FT232H driver for Altera FPP Thread-Topic: [PATCH 3/3] fpga manager: Add FT232H driver for Altera FPP Thread-Index: AQHS9pl9/8J2EWAd7kmun9KAa2+xrqJIGXWA Date: Fri, 7 Jul 2017 09:34:41 +0000 Message-ID: <063D6719AE5E284EB5DD2968C1650D6DD003568E@AcuExch.aculab.com> References: <1499374158-12388-1-git-send-email-agust@denx.de> <1499374158-12388-4-git-send-email-agust@denx.de> In-Reply-To: <1499374158-12388-4-git-send-email-agust@denx.de> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.202.99.200] Content-Type: text/plain; charset="Windows-1252" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-Outbound-IP: 156.67.243.126 X-Env-From: David.Laight@ACULAB.COM X-Proto: esmtps X-Revdns: X-HELO: AcuExch.aculab.com X-TLS: TLSv1:AES128-SHA:128 X-Authenticated_ID: X-PolicySMART: 3396946, 3397078 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 767 Lines: 21 From: Anatolij Gustschin > Sent: 06 July 2017 21:49 > > Add FPGA manager driver for loading Altera FPGAs via fast > passive parallel (FPP) interface using FTDI FT232H chip. I can't help feeling this is very specific for a particular card. While all(?) Altera (now Intel) FPGA support FPP programming it will require extra on-board logic to interface to anything external - especially something as generic as the FT232H. Since this isn't a connector that Altera put on any of their dev boards (not any I've seen anyway), the board manufacturer has probably picked their own assignments for the pins. The only standard interface for programming the FPGA is the JTAG one - and the data formats for that probably require reverse engineering (has been done). David