Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752614AbdGIRkS (ORCPT ); Sun, 9 Jul 2017 13:40:18 -0400 Received: from mail-yb0-f177.google.com ([209.85.213.177]:34001 "EHLO mail-yb0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752295AbdGIRkR (ORCPT ); Sun, 9 Jul 2017 13:40:17 -0400 From: Vladimir Barinov To: Marek Vasut , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Vladimir Barinov Subject: [PATCH v2 2/2] dt: Add bindings for IDT VersaClock 5P49V5925 Date: Sun, 9 Jul 2017 20:40:05 +0300 Message-Id: <1499622005-13003-1-git-send-email-vladimir.barinov@cogentembedded.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1499621970-12925-1-git-send-email-vladimir.barinov@cogentembedded.com> References: <1499621970-12925-1-git-send-email-vladimir.barinov@cogentembedded.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1841 Lines: 53 From: Vladimir Barinov IDT VersaClock 5 5P49V5925 has 5 clock outputs, 4 fractional dividers. Input clock source can be taken only from external reference clock. Signed-off-by: Vladimir Barinov --- Changes in version 2: - fixed typo in patch header: VC5 has 5 clock outputs - rebased against patch: [V3,7/8] clk: vc5: Add bindings for IDT VersaClock 5P49V6901 Documentation/devicetree/bindings/clock/idt,versaclock5.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt index 66ef0a0..05a245c 100644 --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt @@ -8,6 +8,7 @@ generators providing from 3 to 12 output clocks. Required properties: - compatible: shall be one of "idt,5p49v5923" + "idt,5p49v5925" "idt,5p49v5933" "idt,5p49v5935" "idt,5p49v6901" @@ -15,6 +16,7 @@ Required properties: - #clock-cells: from common clock binding; shall be set to 1. - clocks: from common clock binding; list of parent clock handles, - 5p49v5923 and + 5p49v5925 and 5p49v6901: (required) either or both of XTAL or CLKIN reference clock. - 5p49v5933 and @@ -23,6 +25,7 @@ Required properties: clock. - clock-names: from common clock binding; clock input names, can be - 5p49v5923 and + 5p49v5925 and 5p49v6901: (required) either or both of "xin", "clkin". - 5p49v5933 and - 5p49v5935: (optional) property not present or "clkin". @@ -42,6 +45,7 @@ clock specifier, the following mapping applies: 1 -- OUT1 2 -- OUT4 +5P49V5925 and 5P49V5935: 0 -- OUT0_SEL_I2CB 1 -- OUT1 -- 1.9.1