Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755610AbdGKLBu (ORCPT ); Tue, 11 Jul 2017 07:01:50 -0400 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:51654 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1755570AbdGKLBq (ORCPT ); Tue, 11 Jul 2017 07:01:46 -0400 From: Chunyan Zhang To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland CC: , , , , Arnd Bergmann , Mark Brown , Xiaolong Zhang , Ben Li , Orson Zhai , Chunyan Zhang , Chunyan Zhang Subject: [PATCH V2 10/10] arm64: dts: add clocks for SC9860 Date: Tue, 11 Jul 2017 18:56:27 +0800 Message-ID: <20170711105627.20526-11-chunyan.zhang@spreadtrum.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20170711105627.20526-1-chunyan.zhang@spreadtrum.com> References: <20170711105627.20526-1-chunyan.zhang@spreadtrum.com> MIME-Version: 1.0 Content-Type: text/plain X-MAIL: SHSQR01.spreadtrum.com v6BB17NR059779 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1930 Lines: 69 Now we have clock driver, so add clock devicetree data for SC9860. Signed-off-by: Chunyan Zhang --- arch/arm64/boot/dts/sprd/sc9860.dtsi | 22 ++++++++++++++++++++++ arch/arm64/boot/dts/sprd/whale2.dtsi | 3 +-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi index 7b7d8ce..8d3f549 100644 --- a/arch/arm64/boot/dts/sprd/sc9860.dtsi +++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi @@ -7,6 +7,7 @@ */ #include +#include #include "whale2.dtsi" / { @@ -183,6 +184,27 @@ }; soc { + clk: clk { + compatible = "sprd,sc9860-clk"; + #clock-cells = <1>; + reg = <0 0x20000000 0 0x400>, + <0 0x20210000 0 0x3000>, + <0 0x402b0000 0 0x4000>, + <0 0x402d0000 0 0x400>, + <0 0x402e0000 0 0x4000>, + <0 0x40400000 0 0x400>, + <0 0x40880000 0 0x400>, + <0 0x415e0000 0 0x400>, + <0 0x60200000 0 0x400>, + <0 0x61000000 0 0x400>, + <0 0x61100000 0 0x3000>, + <0 0x62000000 0 0x4000>, + <0 0x62100000 0 0x4000>, + <0 0x63000000 0 0x400>, + <0 0x63100000 0 0x3000>, + <0 0x70b00000 0 0x3000>; + }; + funnel@10001000 { /* SoC Funnel */ compatible = "arm,coresight-funnel", "arm,primecell"; reg = <0 0x10001000 0 0x1000>; diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index 7c217c5..a4f376e 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -59,13 +59,12 @@ status = "disabled"; }; }; - }; ext_26m: ext-26m { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; - clock-output-names = "ext_26m"; + clock-output-names = "ext-26m"; }; }; -- 2.7.4