Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933918AbdGLIb1 (ORCPT ); Wed, 12 Jul 2017 04:31:27 -0400 Received: from mail.kernel.org ([198.145.29.99]:41520 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933664AbdGLIbZ (ORCPT ); Wed, 12 Jul 2017 04:31:25 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 863A622C9B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=shawnguo@kernel.org Date: Wed, 12 Jul 2017 16:31:10 +0800 From: Shawn Guo To: Romain Perier Cc: Sascha Hauer , Fabio Estevam , devicetree@vger.kernel.org, Rob Herring , Ian Campbell , Pawel Moll , Mark Rutland , Kumar Gala , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martyn Welch Subject: Re: [PATCH] ARM: dts: imx: Correct B850v3 clock assignment Message-ID: <20170712083109.GK3172@dragon> References: <20170630134337.18245-1-romain.perier@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170630134337.18245-1-romain.perier@collabora.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 691 Lines: 16 On Fri, Jun 30, 2017 at 03:43:37PM +0200, Romain Perier wrote: > From: Martyn Welch > > The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m > to avoid stepping on the LVDS output's toes, as the PLL can't be clocked > to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the > same time. > > As we are using ipu1_di0 and ipu2_di0, ensure both are switched to > to pll2_pfd2_396m to avoid issues. The LDB driver will switch the > required IPU to ldb_di1 when it uses it to drive LVDS. > > Signed-off-by: Martyn Welch > Signed-off-by: Romain Perier Applied, thanks.