Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751292AbdGLXOS (ORCPT ); Wed, 12 Jul 2017 19:14:18 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:34462 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750805AbdGLXOP (ORCPT ); Wed, 12 Jul 2017 19:14:15 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BAFF860F8F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Wed, 12 Jul 2017 16:14:13 -0700 From: Stephen Boyd To: Georgi Djakov Cc: mturquette@baylibre.com, andy.gross@linaro.org, architt@codeaurora.org, bjorn.andersson@linaro.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] clk: qcom: clk-smd-rpm: Fix the initial rate of branches Message-ID: <20170712231413.GP22780@codeaurora.org> References: <20170704123447.25552-1-georgi.djakov@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170704123447.25552-1-georgi.djakov@linaro.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1925 Lines: 44 On 07/04, Georgi Djakov wrote: > As there is no way to actually query the hardware for the current clock > rate, now racalc_rate() just returns the last rate that was previously > set. But if the rate was not set yet, we return the bogus rate of 1KHz. > > Knowing what the rate of XO is and that some clocks are just branches of > it, we can do better and return that rate instead of a bogus one. > > Reported-by: Archit Taneja > Signed-off-by: Georgi Djakov > --- > drivers/clk/qcom/clk-smd-rpm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c > index d990fe44aef3..7350a43b0573 100644 > --- a/drivers/clk/qcom/clk-smd-rpm.c > +++ b/drivers/clk/qcom/clk-smd-rpm.c > @@ -116,12 +116,12 @@ > > #define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active, r_id) \ > __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, \ > - QCOM_SMD_RPM_CLK_BUF_A, r_id, 0, 1000, \ > + QCOM_SMD_RPM_CLK_BUF_A, r_id, 0, 19200000, \ > QCOM_RPM_KEY_SOFTWARE_ENABLE) > > #define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, _active, r_id) \ > __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, \ > - QCOM_SMD_RPM_CLK_BUF_A, r_id, 0, 1000, \ > + QCOM_SMD_RPM_CLK_BUF_A, r_id, 0, 19200000, \ > QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY) > > #define to_clk_smd_rpm(_hw) container_of(_hw, struct clk_smd_rpm, hw) Also, it would be better if these were children of the xo_board clk. That way we don't have to specify a rate at all, just take the rate from the parent (xo_board) and then things look correct regardless of the board configuration. So I'll drop this patch from clk-next for now. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project