Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752899AbdGMTMY (ORCPT ); Thu, 13 Jul 2017 15:12:24 -0400 Received: from plaes.org ([188.166.43.21]:60459 "EHLO plaes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752735AbdGMTMW (ORCPT ); Thu, 13 Jul 2017 15:12:22 -0400 Date: Thu, 13 Jul 2017 19:12:21 +0000 From: Priit Laes To: Jonathan Liu Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Russell King , Philipp Zabel , linux-clk@vger.kernel.org, devicetree , linux-arm-kernel , linux-kernel , linux-sunxi Subject: Re: [PATCH v5 2/6] clk: sunxi-ng: Add sun4i/sun7i CCU driver Message-ID: <20170713191221.GA22375@plaes.org> References: <65066c74b8dedfeb8de27d90b5fecfea3a700178.1499197129.git-series.plaes@plaes.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1771 Lines: 43 On Sun, Jul 09, 2017 at 10:25:23PM +1000, Jonathan Liu wrote: > Hi Priit, > > On 5 July 2017 at 06:04, Priit Laes wrote: > > Introduce a clock controller driver for sun4i A10 and sun7i A20 > > series SoCs. > > > > Signed-off-by: Priit Laes > > --- > > drivers/clk/sunxi-ng/Kconfig | 14 +- > > drivers/clk/sunxi-ng/Makefile | 1 +- > > drivers/clk/sunxi-ng/ccu-sun4i-a10.c | 1448 ++++++++++++++++++++++- > > drivers/clk/sunxi-ng/ccu-sun4i-a10.h | 61 +- > > include/dt-bindings/clock/sun4i-a10-ccu.h | 200 +++- > > include/dt-bindings/clock/sun7i-a20-ccu.h | 53 +- > > include/dt-bindings/reset/sun4i-a10-ccu.h | 67 +- > > 7 files changed, 1844 insertions(+) > > create mode 100644 drivers/clk/sunxi-ng/ccu-sun4i-a10.c > > create mode 100644 drivers/clk/sunxi-ng/ccu-sun4i-a10.h > > create mode 100644 include/dt-bindings/clock/sun4i-a10-ccu.h > > create mode 100644 include/dt-bindings/clock/sun7i-a20-ccu.h > > create mode 100644 include/dt-bindings/reset/sun4i-a10-ccu.h > > > [snip] > > diff --git a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c > > new file mode 100644 > > index 0000000..49052b7 > > --- /dev/null > > +++ b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c > [snip] > > > +static const char *const hdmi_parents[] = { "pll-video0", "pll-video0-2x", > > + "pll-video1", "pll-video1-2x" }; > > +static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents, > > + 0x150, 0, 4, 24, 2, BIT(31), 0); > > hdmi_parents is in the wrong order. The correct order is "pll-video0", > "pll-video1", "pll-video0-2x", "pll-video1-2x". Ugh.. I'm really sorry. P?ikest, Priit