Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752745AbdGMXCV (ORCPT ); Thu, 13 Jul 2017 19:02:21 -0400 Received: from mail-pg0-f67.google.com ([74.125.83.67]:35844 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752446AbdGMXCT (ORCPT ); Thu, 13 Jul 2017 19:02:19 -0400 Message-ID: <1499986876.28717.1.camel@gmail.com> Subject: Re: [PATCH 2/6] mm/device-public-memory: device memory cache coherent with CPU v4 From: Balbir Singh To: =?ISO-8859-1?Q?J=E9r=F4me?= Glisse , linux-kernel@vger.kernel.org, linux-mm@kvack.org Cc: John Hubbard , David Nellans , Dan Williams , Michal Hocko , Balbir Singh , Aneesh Kumar , "Paul E . McKenney" , Benjamin Herrenschmidt , Ross Zwisler Date: Fri, 14 Jul 2017 09:01:16 +1000 In-Reply-To: <20170713211532.970-3-jglisse@redhat.com> References: <20170713211532.970-1-jglisse@redhat.com> <20170713211532.970-3-jglisse@redhat.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1ubuntu1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 984 Lines: 25 On Thu, 2017-07-13 at 17:15 -0400, Jérôme Glisse wrote: > Platform with advance system bus (like CAPI or CCIX) allow device > memory to be accessible from CPU in a cache coherent fashion. Add > a new type of ZONE_DEVICE to represent such memory. The use case > are the same as for the un-addressable device memory but without > all the corners cases. > > Changed since v3: > - s/public/public (going back) > Changed since v2: > - s/public/public > - add proper include in migrate.c and drop useless #if/#endif > Changed since v1: > - Kconfig and #if/#else cleanup > > Signed-off-by: Jérôme Glisse > Cc: Balbir Singh > Cc: Aneesh Kumar > Cc: Paul E. McKenney > Cc: Benjamin Herrenschmidt > Cc: Dan Williams > Cc: Ross Zwisler > --- Acked-by: Balbir Singh