Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751304AbdGQFTA convert rfc822-to-8bit (ORCPT ); Mon, 17 Jul 2017 01:19:00 -0400 Received: from mga05.intel.com ([192.55.52.43]:10414 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751093AbdGQFS7 (ORCPT ); Mon, 17 Jul 2017 01:18:59 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,373,1496127600"; d="scan'208";a="127485372" From: "Chakravarty, Souvik K" To: "Bhardwaj, Rajneesh" , "platform-driver-x86@vger.kernel.org" CC: "dvhart@infradead.org" , "andy@infradead.org" , "linux-kernel@vger.kernel.org" , "Murthy, Shanth" , "Bhardwaj, Rajneesh" Subject: RE: [PATCH 1/3] platform/x86: Add GLK PSS Event Table Thread-Topic: [PATCH 1/3] platform/x86: Add GLK PSS Event Table Thread-Index: AQHS/JfrcJJg3wQZNEmqi8Q752JtTaJXfxtQ Date: Mon, 17 Jul 2017 05:18:54 +0000 Message-ID: <5F7315E704FA0841B5DFCE90329B2BB462E9006C@BGSMSX102.gar.corp.intel.com> References: <1500033228-634-1-git-send-email-rajneesh.bhardwaj@intel.com> In-Reply-To: <1500033228-634-1-git-send-email-rajneesh.bhardwaj@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.223.10.10] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3496 Lines: 102 +1 From me. > -----Original Message----- > From: platform-driver-x86-owner@vger.kernel.org [mailto:platform-driver- > x86-owner@vger.kernel.org] On Behalf Of Rajneesh Bhardwaj > Sent: Friday, July 14, 2017 5:24 PM > To: platform-driver-x86@vger.kernel.org > Cc: dvhart@infradead.org; andy@infradead.org; linux- > kernel@vger.kernel.org; Murthy, Shanth ; > Chakravarty, Souvik K ; Bhardwaj, > Rajneesh > Subject: [PATCH 1/3] platform/x86: Add GLK PSS Event Table > > Some of the Primary Subsystem events differ on Gemini Lake but the IOSS > events remain same. This patch adds the updated PSS event table to enable > Telemetry driver on Gemini Lake. > > Signed-off-by: Shanth Murthy > Signed-off-by: Rajneesh Bhardwaj > --- > drivers/platform/x86/intel_telemetry_debugfs.c | 1 + > drivers/platform/x86/intel_telemetry_pltdrv.c | 35 > ++++++++++++++++++++++++++ > 2 files changed, 36 insertions(+) > > diff --git a/drivers/platform/x86/intel_telemetry_debugfs.c > b/drivers/platform/x86/intel_telemetry_debugfs.c > index 4cc2f4ea0a25..a0e4344b2eec 100644 > --- a/drivers/platform/x86/intel_telemetry_debugfs.c > +++ b/drivers/platform/x86/intel_telemetry_debugfs.c > @@ -331,6 +331,7 @@ static struct telemetry_debugfs_conf > telem_apl_debugfs_conf = { > > static const struct x86_cpu_id telemetry_debugfs_cpu_ids[] = { > TELEM_DEBUGFS_CPU(INTEL_FAM6_ATOM_GOLDMONT, > telem_apl_debugfs_conf), > + TELEM_DEBUGFS_CPU(INTEL_FAM6_ATOM_GEMINI_LAKE, > +telem_apl_debugfs_conf), > {} > }; > > diff --git a/drivers/platform/x86/intel_telemetry_pltdrv.c > b/drivers/platform/x86/intel_telemetry_pltdrv.c > index 6ebdbd2b04fc..6393b3b1d5a6 100644 > --- a/drivers/platform/x86/intel_telemetry_pltdrv.c > +++ b/drivers/platform/x86/intel_telemetry_pltdrv.c > @@ -153,6 +153,30 @@ static struct telemetry_evtmap > {"PC2_AND_MEM_SHALLOW_IDLE_RES", 0x1D40}, > }; > > +static struct telemetry_evtmap > + > telemetry_glk_pss_default_events[TELEM_MAX_OS_ALLOCATED_E > VENTS] = { > + {"IA_CORE0_C6_RES", 0x0400}, > + {"IA_CORE0_C6_CTR", 0x0000}, > + {"IA_MODULE0_C7_RES", 0x0410}, > + {"IA_MODULE0_C7_CTR", 0x000C}, > + {"IA_C0_RES", 0x0805}, > + {"PCS_LTR", 0x2801}, > + {"PSTATES", 0x2802}, > + {"SOC_S0I3_RES", 0x0407}, > + {"SOC_S0I3_CTR", 0x0008}, > + {"PCS_S0I3_CTR", 0x0007}, > + {"PCS_C1E_RES", 0x0414}, > + {"PCS_IDLE_STATUS", 0x2806}, > + {"IA_PERF_LIMITS", 0x280B}, > + {"GT_PERF_LIMITS", 0x280C}, > + {"PCS_WAKEUP_S0IX_CTR", 0x0025}, > + {"PCS_IDLE_BLOCKED", 0x2C00}, > + {"PCS_S0IX_BLOCKED", 0x2C01}, > + {"PCS_S0IX_WAKE_REASONS", 0x2C02}, > + {"PCS_LTR_BLOCKING", 0x2C03}, > + {"PC2_AND_MEM_SHALLOW_IDLE_RES", 0x1D40}, > +}; > + > /* APL specific Data */ > static struct telemetry_plt_config telem_apl_config = { > .pss_config = { > @@ -163,8 +187,19 @@ static struct telemetry_plt_config > telem_apl_config = { > }, > }; > > +/* GLK specific Data */ > +static struct telemetry_plt_config telem_glk_config = { > + .pss_config = { > + .telem_evts = telemetry_glk_pss_default_events, > + }, > + .ioss_config = { > + .telem_evts = telemetry_apl_ioss_default_events, > + }, > +}; > + > static const struct x86_cpu_id telemetry_cpu_ids[] = { > TELEM_CPU(INTEL_FAM6_ATOM_GOLDMONT, telem_apl_config), > + TELEM_CPU(INTEL_FAM6_ATOM_GEMINI_LAKE, telem_glk_config), > {} > }; > > -- > 2.7.4