Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751471AbdGQO25 (ORCPT ); Mon, 17 Jul 2017 10:28:57 -0400 Received: from mail-he1eur01on0055.outbound.protection.outlook.com ([104.47.0.55]:15676 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751559AbdGQO2D (ORCPT ); Mon, 17 Jul 2017 10:28:03 -0400 From: Laurentiu Tudor To: Arnd Bergmann CC: gregkh , Stuart Yoder , "devel@driverdev.osuosl.org" , "Linux Kernel Mailing List" , Marc Zyngier , Alexander Graf , Ioana Ciornei , Ruxandra Ioana Radulescu , Bharat Bhushan , Catalin Horghidan , Leo Li , Roy Pledge , Linux ARM Subject: Re: [PATCH 6/7] staging: fsl-mc: rewrite mc command send/receive to work on 32-bits Thread-Topic: [PATCH 6/7] staging: fsl-mc: rewrite mc command send/receive to work on 32-bits Thread-Index: AQHS/wBzPleRJFQYukKH8pTIIt4qC6JYB++AgAALaAA= Date: Mon, 17 Jul 2017 14:27:57 +0000 Message-ID: <596CC912.3020709@nxp.com> References: <20170717132646.3020-1-laurentiu.tudor@nxp.com> <20170717132646.3020-7-laurentiu.tudor@nxp.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: arndb.de; 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x-forefront-prvs: 0371762FE7 spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="utf-8" Content-ID: <15C6D6CADA4D91419F101F91DECE4F2D@eurprd04.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-originalarrivaltime: 17 Jul 2017 14:27:57.6801 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2560 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id v6HET3mG013583 Content-Length: 2859 Lines: 72 Hi Arnd, On 07/17/2017 04:45 PM, Arnd Bergmann wrote: > On Mon, Jul 17, 2017 at 3:26 PM, wrote: >> From: Laurentiu Tudor >> >> Split the 64-bit accesses in 32-bit accesses because there's no real >> constrain in MC to do only atomic 64-bit. There's only one place >> where ordering is important: when writing the MC command header the >> first 32-bit part of the header must be written last. >> We do this switch in order to allow compiling the driver on 32-bit. >> >> Signed-off-by: Laurentiu Tudor >> --- >> drivers/staging/fsl-mc/bus/mc-sys.c | 31 ++++++++++++------------------- >> 1 file changed, 12 insertions(+), 19 deletions(-) >> >> diff --git a/drivers/staging/fsl-mc/bus/mc-sys.c b/drivers/staging/fsl-mc/bus/mc-sys.c >> index 195d9f3..dd2828e 100644 >> --- a/drivers/staging/fsl-mc/bus/mc-sys.c >> +++ b/drivers/staging/fsl-mc/bus/mc-sys.c >> @@ -124,14 +124,15 @@ static inline void mc_write_command(struct mc_command __iomem *portal, >> { >> int i; >> >> - /* copy command parameters into the portal */ >> - for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++) >> - __raw_writeq(cmd->params[i], &portal->params[i]); >> - /* ensure command params are committed before submitting it */ >> - wmb(); >> - >> - /* submit the command by writing the header */ >> - __raw_writeq(cmd->header, &portal->header); >> + /* >> + * copy command parameters into the portal. Final write >> + * triggers the submission of the command. >> + */ >> + for (i = sizeof(struct mc_command) / sizeof(u32) - 1; i >= 0; i--) { >> + __raw_writel(((u32 *)cmd)[i], &((u32 *)portal)[i]); >> + /* ensure command params are committed before submitting it */ >> + wmb(); >> + } >> } > > What is the byte order requirement on this buffer? Endianness is handled by the callers so this function must leave the binary blob intact. > If this is a byte string > rather than individual registers, you should probably just use > memcpy_toio() It's a header followed by an opaque command. The protocol for queueing a command says that the first 32-bit half of the header must be written last, this triggering the command handling in the MC. > but if these are separate registers, then using the > __raw_* accessors is still wrong, at least on kernels that have a > different byteorder from the hardware. As mentioned above, endianness is handled by the caller. This function takes raw data and must leave it unchanged. > Also, are you sure that adding those six extra barriers has no > performance impact? This is a slow interface used in slow paths, so i don't think those extra barriers will have any performance impact. --- Thanks & Best Regards, Laurentiu