Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752556AbdGRJvg (ORCPT ); Tue, 18 Jul 2017 05:51:36 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:48603 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752461AbdGRJto (ORCPT ); Tue, 18 Jul 2017 05:49:44 -0400 From: To: , , , , , , , , CC: , , , Sean Wang Subject: [PATCH v2 5/9] soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit mode Date: Tue, 18 Jul 2017 17:49:25 +0800 Message-ID: <51797692a1ed2e1cf92ae95902ebd150e2161e22.1500368529.git.sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3391 Lines: 124 From: Sean Wang Some regulators such as MediaTek MT6380 also has to be written in 32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write into pwrap_write16 and one additional function pointer is introduced for increasing flexibility allowing the determination which mode is used by the pwrap slave detection through device tree. Signed-off-by: Chenglin Xu Signed-off-by: Chen Zhong Signed-off-by: Sean Wang --- drivers/soc/mediatek/mtk-pmic-wrap.c | 63 +++++++++++++++++++++++++++--------- 1 file changed, 47 insertions(+), 16 deletions(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 4385e8d..03c0520 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -506,6 +506,7 @@ struct pwrap_slv_type { * which type is used by the detection through device tree. */ int (*pwrap_read)(struct pmic_wrapper *wrp, u32 adr, u32 *rdata); + int (*pwrap_write)(struct pmic_wrapper *wrp, u32 adr, u32 wdata); }; struct pmic_wrapper { @@ -600,22 +601,6 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp, } while (1); } -static int pwrap_write(struct pmic_wrapper *wrp, u32 adr, u32 wdata) -{ - int ret; - - ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle); - if (ret) { - pwrap_leave_fsm_vldclr(wrp); - return ret; - } - - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata, - PWRAP_WACS2_CMD); - - return 0; -} - static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata) { int ret; @@ -672,6 +657,49 @@ static int pwrap_read(struct pmic_wrapper *wrp, u32 adr, u32 *rdata) return wrp->slave->pwrap_read(wrp, adr, rdata); } +static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata) +{ + int ret; + + ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle); + if (ret) { + pwrap_leave_fsm_vldclr(wrp); + return ret; + } + + pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata, + PWRAP_WACS2_CMD); + + return 0; +} + +static int pwrap_write32(struct pmic_wrapper *wrp, u32 adr, u32 wdata) +{ + int ret, msb, rdata; + + for (msb = 0; msb < 2; msb++) { + ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle); + if (ret) { + pwrap_leave_fsm_vldclr(wrp); + return ret; + } + + pwrap_writel(wrp, (1 << 31) | (msb << 30) | (adr << 16) | + ((wdata >> (msb * 16)) & 0xffff), + PWRAP_WACS2_CMD); + + if (!msb) + pwrap_read(wrp, adr, &rdata); + } + + return 0; +} + +static int pwrap_write(struct pmic_wrapper *wrp, u32 adr, u32 wdata) +{ + return wrp->slave->pwrap_write(wrp, adr, wdata); +} + static int pwrap_regmap_read(void *context, u32 adr, u32 *rdata) { return pwrap_read(context, adr, rdata); @@ -1080,18 +1108,21 @@ static const struct pwrap_slv_type pmic_mt6323 = { .dew_regs = mt6323_regs, .type = PMIC_MT6323, .pwrap_read = pwrap_read16, + .pwrap_write = pwrap_write16, }; static const struct pwrap_slv_type pmic_mt6380 = { .dew_regs = NULL, .type = PMIC_MT6380, .pwrap_read = pwrap_read32, + .pwrap_write = pwrap_write32, }; static const struct pwrap_slv_type pmic_mt6397 = { .dew_regs = mt6397_regs, .type = PMIC_MT6397, .pwrap_read = pwrap_read16, + .pwrap_write = pwrap_write16, }; static const struct of_device_id of_slave_match_tbl[] = { -- 2.7.4