Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751456AbdGRLjv (ORCPT ); Tue, 18 Jul 2017 07:39:51 -0400 Received: from mail-oi0-f43.google.com ([209.85.218.43]:36410 "EHLO mail-oi0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751358AbdGRLju (ORCPT ); Tue, 18 Jul 2017 07:39:50 -0400 MIME-Version: 1.0 In-Reply-To: <596DEC19.6060301@nxp.com> References: <20170717132646.3020-1-laurentiu.tudor@nxp.com> <20170717132646.3020-7-laurentiu.tudor@nxp.com> <596CC912.3020709@nxp.com> <596DEC19.6060301@nxp.com> From: Arnd Bergmann Date: Tue, 18 Jul 2017 13:39:48 +0200 X-Google-Sender-Auth: i7F-MB5P6eSqNXuPBHC2OM-BWhc Message-ID: Subject: Re: [PATCH 6/7] staging: fsl-mc: rewrite mc command send/receive to work on 32-bits To: Laurentiu Tudor Cc: gregkh , Stuart Yoder , "devel@driverdev.osuosl.org" , Linux Kernel Mailing List , Marc Zyngier , Alexander Graf , Ioana Ciornei , Ruxandra Ioana Radulescu , Bharat Bhushan , Catalin Horghidan , Leo Li , Roy Pledge , Linux ARM Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1041 Lines: 25 On Tue, Jul 18, 2017 at 1:08 PM, Laurentiu Tudor wrote: > On 07/17/2017 06:00 PM, Arnd Bergmann wrote: >> Strictly speaking the __raw_writel() won't guarantee that the >> data is written as a single word, the compiler might decide to >> split it up into byte-sized writes if it believes the destination pointer >> is unaligned and the CPU has no efficient writes. >> >> I think this cannot happen on arm or powerpc, as we go through >> inline assembly for the store, but it's not completely portable. > > Should i worry about portability? Slim changes that this driver > will ever run on anything else other than ARM & ARM64. > My current goal was just to make it compile on other arches. I always recommend writing any driver in the most portable way out of principle, since you never know who looks at it for reference when writing another driver. I wouldn't expect the driver itself to be used on other architectures, but of course you never know what CPU becomes fashionable 10 years from now. Arnd