Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751938AbdGRO3e (ORCPT ); Tue, 18 Jul 2017 10:29:34 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:37678 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751775AbdGRO3N (ORCPT ); Tue, 18 Jul 2017 10:29:13 -0400 From: "Gautham R. Shenoy" To: Michael Ellerman , Michael Neuling , Nicholas Piggin , Vaidyanathan Srinivasan , Shilpasri G Bhat , Akshay Adiga Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, "Gautham R. Shenoy" Subject: [PATCH 2/2] powernv/powerpc: Clear PECE1 in LPCR via stop-api only on Hotplug Date: Tue, 18 Jul 2017 19:58:49 +0530 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: In-Reply-To: References: X-TM-AS-GCONF: 00 x-cbid: 17071814-0016-0000-0000-00000733590F X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007381; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000214; SDB=6.00889362; UDB=6.00444232; IPR=6.00669534; BA=6.00005479; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016262; XFM=3.00000015; UTC=2017-07-18 14:29:10 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17071814-0017-0000-0000-00003AA3C56F Message-Id: X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-07-18_06:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1706020000 definitions=main-1707180228 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4159 Lines: 122 From: "Gautham R. Shenoy" Currently we use the stop-api provided by the firmware to program the SLW engine to restore the values of hypervisor resources that get lost on deeper idle states (such as winkle). Since the deep states were only used for CPU-Hotplug on POWER8 systems, we would program the LPCR to have the PECE1 bit since Hotplugged CPUs shouldn't be spuriously woken up by decrementer. On POWER9, some of the deep platform idle states such as stop4 can be used in cpuidle as well. In this case, we want the CPU in stop4 to be woken up by the decrementer when some timer on the CPU expires. In this patch, for POWER9, we program the stop-api for LPCR with PECE1 bit cleared only when we are offlining the CPU. Signed-off-by: Gautham R. Shenoy --- arch/powerpc/platforms/powernv/idle.c | 12 +++++++++++- arch/powerpc/platforms/powernv/smp.c | 28 ++++++++++++++++++++++++---- 2 files changed, 35 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index 2abee07..f4a29d4 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -68,7 +68,7 @@ static int pnv_save_sprs_for_deep_states(void) * all cpus at boot. Get these reg values of current cpu and use the * same across all cpus. */ - uint64_t lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1; + uint64_t lpcr_val = mfspr(SPRN_LPCR); uint64_t hid0_val = mfspr(SPRN_HID0); uint64_t hid1_val = mfspr(SPRN_HID1); uint64_t hid4_val = mfspr(SPRN_HID4); @@ -85,6 +85,16 @@ static int pnv_save_sprs_for_deep_states(void) if (rc != 0) return rc; + /* + * On POWER8, the only state that uses SLW engine is + * winkle. This is only used for CPU-Hotplug. So we + * clear the decrementer bit from LPCR since we + * don't want to be woken up on decrementer when in + * winkle. + */ + if (!cpu_has_feature(CPU_FTR_ARCH_300)) + lpcr_val = lpcr_val & ~(u64)LPCR_PECE1; + rc = opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val); if (rc != 0) return rc; diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c index 40dae96..5f2a712 100644 --- a/arch/powerpc/platforms/powernv/smp.c +++ b/arch/powerpc/platforms/powernv/smp.c @@ -143,7 +143,8 @@ static void pnv_smp_cpu_kill_self(void) { unsigned int cpu; unsigned long srr1, wmask; - + uint64_t lpcr_val; + uint64_t pir; /* Standard hot unplug procedure */ /* * This hard disables local interurpts, ensuring we have no lazy @@ -164,13 +165,17 @@ static void pnv_smp_cpu_kill_self(void) if (cpu_has_feature(CPU_FTR_ARCH_207S)) wmask = SRR1_WAKEMASK_P8; + pir = get_hard_smp_processor_id(cpu); /* We don't want to take decrementer interrupts while we are offline, * so clear LPCR:PECE1. We keep PECE2 (and LPCR_PECE_HVEE on P9) * enabled as to let IPIs in. */ - mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1); + lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1; + mtspr(SPRN_LPCR, lpcr_val); while (!generic_check_cpu_restart(cpu)) { + + /* * Clear IPI flag, since we don't handle IPIs while * offline, except for those when changing micro-threading @@ -180,8 +185,15 @@ static void pnv_smp_cpu_kill_self(void) */ kvmppc_set_host_ipi(cpu, 0); + /* + * If the CPU gets woken up by a special wakeup, + * ensure that the SLW engine sets LPCR with + * decrementer bit cleared, else we will get spurious + * wakeups. + */ + if (cpu_has_feature(CPU_FTR_ARCH_300)) + opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val); srr1 = pnv_cpu_offline(cpu); - WARN_ON(lazy_irq_pending()); /* @@ -220,7 +232,15 @@ static void pnv_smp_cpu_kill_self(void) } /* Re-enable decrementer interrupts */ - mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1); + lpcr_val = mfspr(SPRN_LPCR) | LPCR_PECE1; + mtspr(SPRN_LPCR, lpcr_val); + + /* + * We want stop states to be woken up by decrementer for + * non-hotplug cases. + */ + if (cpu_has_feature(CPU_FTR_ARCH_300)) + opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val); DBG("CPU%d coming online...\n", cpu); } -- 1.9.4