Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752020AbdGSGsN (ORCPT ); Wed, 19 Jul 2017 02:48:13 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:48949 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751228AbdGSGsK (ORCPT ); Wed, 19 Jul 2017 02:48:10 -0400 Message-ID: <1500446884.14021.12.camel@mtksdaap41> Subject: Re: [PATCH v4 2/2] arm64: dts: Add Mediatek SoC MT2712 and evaluation board dts and Makefile From: YT Shen To: Matthias Brugger CC: Rob Herring , Mark Rutland , Thomas Gleixner , Jason Cooper , Marc Zyngier , Greg Kroah-Hartman , Catalin Marinas , Will Deacon , Mars Cheng , , , , , , Date: Wed, 19 Jul 2017 14:48:04 +0800 In-Reply-To: References: <1498123975-9748-1-git-send-email-yt.shen@mediatek.com> <1498123975-9748-3-git-send-email-yt.shen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 5018 Lines: 180 On Tue, 2017-07-18 at 18:29 +0200, Matthias Brugger wrote: > > On 06/22/2017 11:32 AM, YT Shen wrote: > > This adds basic chip support for Mediatek 2712 > > > > Signed-off-by: YT Shen > > --- > > arch/arm64/boot/dts/mediatek/Makefile | 1 + > > arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 32 ++++++ > > arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 172 ++++++++++++++++++++++++++++ > > 3 files changed, 205 insertions(+) > > create mode 100644 arch/arm64/boot/dts/mediatek/mt2712-evb.dts > > create mode 100644 arch/arm64/boot/dts/mediatek/mt2712e.dtsi > > > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > > index 9fbfd32..fcc0604 100644 > > --- a/arch/arm64/boot/dts/mediatek/Makefile > > +++ b/arch/arm64/boot/dts/mediatek/Makefile > > @@ -1,3 +1,4 @@ > > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb > > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb > > dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb > > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb > > diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > > new file mode 100644 > > index 0000000..8c804df > > --- /dev/null > > +++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts > > @@ -0,0 +1,32 @@ > > +/* > > + * Copyright (c) 2017 MediaTek Inc. > > + * Author: YT Shen > > + * > > + * SPDX-License-Identifier: (GPL-2.0 OR MIT) > > + */ > > + > > +/dts-v1/; > > +#include "mt2712e.dtsi" > > + > > +/ { > > + model = "MediaTek MT2712 evaluation board"; > > + compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; > > + > > + aliases { > > + serial0 = &uart0; > > + }; > > + > > + memory@40000000 { > > + device_type = "memory"; > > + reg = <0 0x40000000 0 0x80000000>; > > + }; > > + > > + chosen { > > + stdout-path = "serial0:921600n8"; > > + }; > > +}; > > + > > +&uart0 { > > + status = "okay"; > > +}; > > + > > diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > > new file mode 100644 > > index 0000000..461ee0f > > --- /dev/null > > +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi > > @@ -0,0 +1,172 @@ > > +/* > > + * Copyright (c) 2017 MediaTek Inc. > > + * Author: YT Shen > > + * > > + * SPDX-License-Identifier: (GPL-2.0 OR MIT) > > + */ > > + > > +#include > > +#include > > + > > +/ { > > + compatible = "mediatek,mt2712"; > > + interrupt-parent = <&sysirq>; > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + cpus { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + cpu-map { > > + cluster0 { > > + core0 { > > + cpu = <&cpu0>; > > + }; > > + core1 { > > + cpu = <&cpu1>; > > + }; > > + }; > > + > > + cluster1 { > > + core0 { > > + cpu = <&cpu2>; > > + }; > > + }; > > + }; > > + > > + cpu0: cpu@0 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a35"; > > + reg = <0x000>; > > + }; > > + > > + cpu1: cpu@1 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a35"; > > + reg = <0x001>; > > + enable-method = "psci"; > > + }; > > + > > + cpu2: cpu@200 { > > + device_type = "cpu"; > > + compatible = "arm,cortex-a72"; > > + reg = <0x200>; > > + enable-method = "psci"; > > + }; > > + }; > > + > > + psci { > > + compatible = "arm,psci-0.2"; > > + method = "smc"; > > + }; > > + > > + uart_clk: dummy26m { > > + compatible = "fixed-clock"; > > + clock-frequency = <26000000>; > > + #clock-cells = <0>; > > + }; > > + > > + timer { > > + compatible = "arm,armv8-timer"; > > + interrupt-parent = <&gic>; > > + interrupts = > + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>, > > + > + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>, > > + > + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>, > > + > + (GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_LOW)>; > > + }; > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + compatible = "simple-bus"; > > + ranges; > > + > > + uart5: serial@1000f000 { > > + compatible = "mediatek,mt2712-uart", > > + "mediatek,mt6577-uart"; > > + reg = <0 0x1000f000 0 0x400>; > > + interrupts = ; > > + clocks = <&uart_clk>, <&uart_clk>; > > + clock-names = "baud", "bus"; > > + status = "disabled"; > > + }; > > So baud and bus clock are both 26 MHz? We didn't have CCF clock support in this series. After we have clock source support, we could use the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. The bus clock is 26MHz. The baud clock could be from another clock source, using the same 26MHz fixed clock works also. [1] https://patchwork.kernel.org/patch/9670877/ [2] https://patchwork.kernel.org/patch/6436021/ > Regards, > Matthias