Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S263315AbTFTQfu (ORCPT ); Fri, 20 Jun 2003 12:35:50 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S263349AbTFTQft (ORCPT ); Fri, 20 Jun 2003 12:35:49 -0400 Received: from zeke.inet.com ([199.171.211.198]:60648 "EHLO zeke.inet.com") by vger.kernel.org with ESMTP id S263315AbTFTQf3 (ORCPT ); Fri, 20 Jun 2003 12:35:29 -0400 Message-ID: <3EF33B12.7070901@inet.com> Date: Fri, 20 Jun 2003 11:49:22 -0500 From: Eli Carter User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.0.1) Gecko/20021003 X-Accept-Language: en-us, en MIME-Version: 1.0 To: John Bradford CC: nuno.silva@vgertech.com, torvalds@transmeta.com, linux-kernel@vger.kernel.org, samphan@thai.com, vojtech@suse.cz Subject: Re: Crusoe's persistent translation on linux? References: <200306201040.h5KAerPK000431@81-2-122-30.bradfords.org.uk> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1934 Lines: 42 John Bradford wrote: >>The translations are usually _better_ than statically compiled native >>code (because the whole CPU is designed for speculation, and the static >>compilers don't know how to do that), and thus going to native mode is not >>necessarily a performance improvement. > > > Would it be possible, (with relevant documentation), to tune the code > morphing software for optimum performance of code generated by a > specific compiler, though? > > If a particular version of GCC favours certain constructs and uses > particular sets of registers for a given piece of code, couldn't we > optimise for those cases, at the expense of others? Maybe a > particular compiler doesn't use certain X86 instructions at all, and > these could be eliminated altogether? > > It's not unlikely that an entirely open source system could have all > code compiled with the same compiler, and so maybe we can use this to > avoid implementing expensive corner cases in the CPU, because we're > never going to trigger them. Hmm... basically you want to trim the x86 instruction set to get closer to RISC mentality. Interesting. gcc may already do that to some extent by not using the really complex instructions. If that is the case, dropping those instructions might give some room for testing some of its possible benefits. I doubt restricting the registers used by some instructions would help... I've heard comments that the x86 is register-starved enough already. Have fun, Eli --------------------. "If it ain't broke now, Eli Carter \ it will be soon." -- crypto-gram eli.carter(a)inet.com `------------------------------------------------- - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/