Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933414AbdGSPc3 (ORCPT ); Wed, 19 Jul 2017 11:32:29 -0400 Received: from smtprelay4.synopsys.com ([198.182.47.9]:37342 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755201AbdGSPcZ (ORCPT ); Wed, 19 Jul 2017 11:32:25 -0400 From: Eugeniy Paltsev To: "p.zabel@pengutronix.de" CC: "linux-kernel@vger.kernel.org" , "Eugeniy.Paltsev@synopsys.com" , "mark.rutland@arm.com" , "robh+dt@kernel.org" , "linux-snps-arc@lists.infradead.org" , "devicetree@vger.kernel.org" Subject: Re: [PATCH] ARC: reset: introduce HSDKv1 reset driver Thread-Topic: [PATCH] ARC: reset: introduce HSDKv1 reset driver Thread-Index: AQHS/+tIYQu5i1Sn+0Gcq/dQD94wGKJbICcAgAAG6QA= Date: Wed, 19 Jul 2017 15:32:22 +0000 Message-ID: <1500478342.9320.28.camel@synopsys.com> References: <20170718172520.25546-1-Eugeniy.Paltsev@synopsys.com> <1500476858.2364.45.camel@pengutronix.de> In-Reply-To: <1500476858.2364.45.camel@pengutronix.de> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.121.8.106] Content-Type: text/plain; charset="utf-8" Content-ID: <63031B30951FEB488F834D15D0A77D33@internal.synopsys.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id v6JFWYFX006281 Content-Length: 1257 Lines: 47 Hi Philipp, On Wed, 2017-07-19 at 17:07 +0200, Philipp Zabel wrote: > On Tue, 2017-07-18 at 20:25 +0300, Eugeniy Paltsev wrote: > > The HSDK v1 periphery IPs can be reset by accessing some registers > > from the CGU block. > > > > The list of available reset lines is documented in the DT bindings. > > > > [snip] > > --- a/drivers/reset/Kconfig > > +++ b/drivers/reset/Kconfig > > @@ -34,6 +34,12 @@ config RESET_BERLIN > >   help > >     This enables the reset controller driver for Marvell > > Berlin SoCs. > >   > > +config RESET_HSDK_V1 > > + bool "HSDK v1 Reset Driver" > > + default n > > I suppose there will be a SOC_HSDK_V1 or similar in the future so > that > we can hide this option and enable it by default like the other reset > drivers? Actually we don't have (and don't planning to add) such SOC/board- specific kconfig option, so I am wondering if it is OK to just left this option not hidden? > > [snip] > > + > > +#define CGU_ARC_RST_CTRL 0x0 > > +#define CGU_SYS_RST_CTRL 0x20 > > +#define CGU_DDR_RST_CTRL 0x40 > > +#define CGU_TUN_RST_CTRL 0x60 > > The ARC, DDR, and TUN reset control registers are never used. Ok, I'll remove unused register defines. > > [snip] > > regards > Philipp > Thanks. --  Eugeniy Paltsev