Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754169AbdGUOqk (ORCPT ); Fri, 21 Jul 2017 10:46:40 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:48403 "EHLO imgpgp01.kl.imgtec.org" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753940AbdGUOpG (ORCPT ); Fri, 21 Jul 2017 10:45:06 -0400 X-PGP-Universal: processed; by imgpgp01.kl.imgtec.org on Fri, 21 Jul 2017 16:56:10 +0100 Date: Fri, 21 Jul 2017 15:45:04 +0100 From: James Hogan To: Aleksandar Markovic CC: , Aleksandar Markovic , Miodrag Dinic , Goran Ferenc , Douglas Leung , , Paul Burton , Petar Jovanovic , Raghu Gandham , Ralf Baechle Subject: Re: [PATCH v3 05/16] MIPS: math-emu: .: Fix quiet NaN propagation Message-ID: <20170721144504.GJ6973@jhogan-linux.le.imgtec.org> References: <1500646206-2436-1-git-send-email-aleksandar.markovic@rt-rk.com> <1500646206-2436-6-git-send-email-aleksandar.markovic@rt-rk.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="z1DcCokeeMRSrces" Content-Disposition: inline In-Reply-To: <1500646206-2436-6-git-send-email-aleksandar.markovic@rt-rk.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [192.168.154.110] X-ESG-ENCRYPT-TAG: 1b7d744b Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 9850 Lines: 261 --z1DcCokeeMRSrces Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Jul 21, 2017 at 04:09:03PM +0200, Aleksandar Markovic wrote: > From: Aleksandar Markovic >=20 > Fix the value returned by ., if both inputs > are quiet NaNs. The specifications of . state > that the returned value in such cases should be the quiet NaN > contained in register fs. >=20 > The relevant example: >=20 > MAX.S fd,fs,ft: > If fs contains qNaN1, and ft contains qNaN2, fd is going to contain > qNaN1 (without this patch, it used to contain qNaN2). >=20 Consider adding: Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} = FPU instruction") Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} = FPU instruction") > Signed-off-by: Miodrag Dinic > Signed-off-by: Goran Ferenc > Signed-off-by: Aleksandar Markovic Consider adding: Cc: # 4.3+ > --- > arch/mips/math-emu/dp_fmax.c | 8 ++++++-- > arch/mips/math-emu/dp_fmin.c | 8 ++++++-- > arch/mips/math-emu/sp_fmax.c | 8 ++++++-- > arch/mips/math-emu/sp_fmin.c | 8 ++++++-- > 4 files changed, 24 insertions(+), 8 deletions(-) >=20 > diff --git a/arch/mips/math-emu/dp_fmax.c b/arch/mips/math-emu/dp_fmax.c > index fd71b8d..567fc33 100644 > --- a/arch/mips/math-emu/dp_fmax.c > +++ b/arch/mips/math-emu/dp_fmax.c > @@ -47,6 +47,9 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union= ieee754dp y) > case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): > return ieee754dp_nanxcpt(x); > =20 > + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > + return x; couldn't the above... > + > /* numbers are preferred to NaNs */ > case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): > @@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union= ieee754dp y) =2E.. go somewhere around here and fall through to the existing return x case? and same below of course. Otherwise: Reviewed-by: James Hogan Cheers James > case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): > return x; > =20 > - case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): > @@ -147,6 +149,9 @@ union ieee754dp ieee754dp_fmaxa(union ieee754dp x, un= ion ieee754dp y) > case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): > return ieee754dp_nanxcpt(x); > =20 > + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > + return x; > + > /* numbers are preferred to NaNs */ > case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): > @@ -154,7 +159,6 @@ union ieee754dp ieee754dp_fmaxa(union ieee754dp x, un= ion ieee754dp y) > case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): > return x; > =20 > - case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): > diff --git a/arch/mips/math-emu/dp_fmin.c b/arch/mips/math-emu/dp_fmin.c > index c1072b0..77f7ca9 100644 > --- a/arch/mips/math-emu/dp_fmin.c > +++ b/arch/mips/math-emu/dp_fmin.c > @@ -47,6 +47,9 @@ union ieee754dp ieee754dp_fmin(union ieee754dp x, union= ieee754dp y) > case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): > return ieee754dp_nanxcpt(x); > =20 > + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > + return x; > + > /* numbers are preferred to NaNs */ > case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): > @@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmin(union ieee754dp x, union= ieee754dp y) > case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): > return x; > =20 > - case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): > @@ -147,6 +149,9 @@ union ieee754dp ieee754dp_fmina(union ieee754dp x, un= ion ieee754dp y) > case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): > return ieee754dp_nanxcpt(x); > =20 > + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > + return x; > + > /* numbers are preferred to NaNs */ > case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): > @@ -154,7 +159,6 @@ union ieee754dp ieee754dp_fmina(union ieee754dp x, un= ion ieee754dp y) > case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): > return x; > =20 > - case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): > diff --git a/arch/mips/math-emu/sp_fmax.c b/arch/mips/math-emu/sp_fmax.c > index 4d00084..d46e8e4 100644 > --- a/arch/mips/math-emu/sp_fmax.c > +++ b/arch/mips/math-emu/sp_fmax.c > @@ -47,6 +47,9 @@ union ieee754sp ieee754sp_fmax(union ieee754sp x, union= ieee754sp y) > case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): > return ieee754sp_nanxcpt(x); > =20 > + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > + return x; > + > /* numbers are preferred to NaNs */ > case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): > @@ -54,7 +57,6 @@ union ieee754sp ieee754sp_fmax(union ieee754sp x, union= ieee754sp y) > case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): > return x; > =20 > - case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): > @@ -147,6 +149,9 @@ union ieee754sp ieee754sp_fmaxa(union ieee754sp x, un= ion ieee754sp y) > case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): > return ieee754sp_nanxcpt(x); > =20 > + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > + return x; > + > /* numbers are preferred to NaNs */ > case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): > @@ -154,7 +159,6 @@ union ieee754sp ieee754sp_fmaxa(union ieee754sp x, un= ion ieee754sp y) > case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): > return x; > =20 > - case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): > diff --git a/arch/mips/math-emu/sp_fmin.c b/arch/mips/math-emu/sp_fmin.c > index 4eb1bb9..b528c4b 100644 > --- a/arch/mips/math-emu/sp_fmin.c > +++ b/arch/mips/math-emu/sp_fmin.c > @@ -47,6 +47,9 @@ union ieee754sp ieee754sp_fmin(union ieee754sp x, union= ieee754sp y) > case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): > return ieee754sp_nanxcpt(x); > =20 > + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > + return x; > + > /* numbers are preferred to NaNs */ > case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): > @@ -54,7 +57,6 @@ union ieee754sp ieee754sp_fmin(union ieee754sp x, union= ieee754sp y) > case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): > return x; > =20 > - case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): > case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): > @@ -147,6 +149,9 @@ union ieee754sp ieee754sp_fmina(union ieee754sp x, un= ion ieee754sp y) > case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): > return ieee754sp_nanxcpt(x); > =20 > + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): > + return x; > + > /* numbers are preferred to NaNs */ > case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): > case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): > @@ -154,7 +159,6 @@ union ieee754sp ieee754sp_fmina(union ieee754sp x, un= ion ieee754sp y) > case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): > return x; 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