Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754803AbdGUWB6 (ORCPT ); Fri, 21 Jul 2017 18:01:58 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:40968 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754705AbdGUWB4 (ORCPT ); Fri, 21 Jul 2017 18:01:56 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D700460D35 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Fri, 21 Jul 2017 15:01:54 -0700 From: Stephen Boyd To: Yuantian Tang Cc: mturquette@baylibre.com, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/2] clk: qoriq: add clock configuration for ls1088a soc Message-ID: <20170721220154.GL19878@codeaurora.org> References: <1491445283-13053-1-git-send-email-andy.tang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1491445283-13053-1-git-send-email-andy.tang@nxp.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 537 Lines: 15 On 04/06, Yuantian Tang wrote: > Clock on ls1088a chip takes primary clocking input from the external > SYSCLK signal. The SYSCLK input (frequency) is multiplied using > multiple phase locked loops (PLL) to create a variety of frequencies > which can then be passed to a variety of internal logic, including > cores and peripheral IP modules. > > Signed-off-by: Tang Yuantian > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project