Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932308AbdGXNiJ (ORCPT ); Mon, 24 Jul 2017 09:38:09 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:35258 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932127AbdGXNgE (ORCPT ); Mon, 24 Jul 2017 09:36:04 -0400 From: Ricardo Ribalda Delgado To: Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , David Airlie , Rex Zhu , Tom St Denis , Eric Huang , Huang Rui , Dan Carpenter , "Edward O'Callaghan" , Kees Cook , "Andrew F. Davis" , Hawking Zhang , Baoyou Xie , Masahiro Yamada , Colin Ian King , =?UTF-8?q?Nils=20Wallm=C3=A9nius?= , Joe Perches , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: Ricardo Ribalda Delgado Subject: [PATCH 10/14] amdgpu: powerplay: vega10_hwmgr: Assume display_config is zero Date: Mon, 24 Jul 2017 15:35:36 +0200 Message-Id: <20170724133540.32200-11-ricardo.ribalda@gmail.com> X-Mailer: git-send-email 2.13.2 In-Reply-To: <20170724133540.32200-1-ricardo.ribalda@gmail.com> References: <20170724133540.32200-1-ricardo.ribalda@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2438 Lines: 60 display_config is never set, so we can assume that it is zero Signed-off-by: Ricardo Ribalda Delgado --- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index d6f097f44b6c..dd73ab7e5cfe 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c @@ -3044,8 +3044,6 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, cgs_get_active_displays_info(hwmgr->device, &info); /* result = PHM_CheckVBlankTime(hwmgr, &vblankTooShort);*/ - minimum_clocks.engineClock = hwmgr->display_config.min_core_set_clock; - minimum_clocks.memoryClock = hwmgr->display_config.min_mem_set_clock; if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_StablePState)) { @@ -4000,10 +3998,6 @@ static int vega10_notify_smc_display_config_after_ps_adjustment( else vega10_notify_smc_display_change(hwmgr, true); - min_clocks.dcefClock = hwmgr->display_config.min_dcef_set_clk; - min_clocks.dcefClockInSR = hwmgr->display_config.min_dcef_deep_sleep_set_clk; - min_clocks.memoryClock = hwmgr->display_config.min_mem_set_clock; - for (i = 0; i < dpm_table->count; i++) { if (dpm_table->dpm_levels[i].value == min_clocks.dcefClock) break; @@ -4634,20 +4628,19 @@ static bool vega10_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) { struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend); - bool is_update_required = false; struct cgs_display_info info = {0, 0, NULL}; cgs_get_active_displays_info(hwmgr->device, &info); if (data->display_timing.num_existing_displays != info.display_count) - is_update_required = true; + return true; - if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) { - if (data->display_timing.min_clock_in_sr != hwmgr->display_config.min_core_set_clock_in_sr) - is_update_required = true; - } + if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_SclkDeepSleep) && + data->display_timing.min_clock_in_sr) + return true; - return is_update_required; + return false; } static int vega10_disable_dpm_tasks(struct pp_hwmgr *hwmgr) -- 2.13.2