Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756408AbdGXPFd (ORCPT ); Mon, 24 Jul 2017 11:05:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51780 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932477AbdGXPFV (ORCPT ); Mon, 24 Jul 2017 11:05:21 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com C359C883D1 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=alex.williamson@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com C359C883D1 Date: Mon, 24 Jul 2017 09:05:16 -0600 From: Alex Williamson To: Ding Tianhong Cc: Sinan Kaya , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v7 2/3] PCI: Enable PCIe Relaxed Ordering if supported Message-ID: <20170724090516.2e0f0d2a@w520.home> In-Reply-To: <5f9b8bfb-41a8-a17c-6fea-581aec1d5573@huawei.com> References: <1499955692-26556-1-git-send-email-dingtianhong@huawei.com> <1499955692-26556-3-git-send-email-dingtianhong@huawei.com> <0260e398-bd8e-6615-6d5c-1f7c07b6fc09@huawei.com> <67be791f-e0cf-8284-9229-17174dc741ef@codeaurora.org> <5f9b8bfb-41a8-a17c-6fea-581aec1d5573@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 24 Jul 2017 15:05:21 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1088 Lines: 28 On Sat, 22 Jul 2017 12:19:38 +0800 Ding Tianhong wrote: > Hi Sinan, Bjorn: > > On 2017/7/14 21:54, Sinan Kaya wrote: > > On 7/13/2017 9:26 PM, Ding Tianhong wrote: > >> There is no code to enable the PCIe Relaxed Ordering bit in the configuration space, > >> it is only be enable by default according to the PCIe Standard Specification, what we > >> do is to distinguish the RC problematic platform and clear the Relaxed Ordering bit > >> to tell the PCIe EP don't send any TLPs with Relaxed Ordering Attributes to the Root > >> Complex. > > > > Maybe, you should change the patch commit as > > "Disable PCIe Relaxed Ordering if not supported"... > > I agree that to use the new commit title as your suggested, thanks. :) > > @Bjorn do you want me to spawn a new patchset with the new commit title > and the Reviewed-by from Casey on the patch 3, or maybe you could pick this > up and modify it own ? thanks. Hi Ding, Bjorn is currently on holiday so it might be a good idea to respin the series with any updates so nothing is lost. Thanks, Alex