Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751689AbdGYL1v (ORCPT ); Tue, 25 Jul 2017 07:27:51 -0400 Received: from mail.izt-labs.de ([82.135.25.162]:51337 "EHLO mail.izt-labs.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751582AbdGYL1t (ORCPT ); Tue, 25 Jul 2017 07:27:49 -0400 From: Johannes Poehlmann To: linux-kernel@vger.kernel.org Cc: Johannes Poehlmann , Evgeniy Polyakov , Greg Kroah-Hartman Subject: [PATCH v4 2/5] w1: ds1wm: make endian clean and use standard io memory accessors Date: Tue, 25 Jul 2017 13:27:12 +0200 Message-Id: <1500982035-28838-3-git-send-email-johannes.poehlmann@izt-labs.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1500982035-28838-1-git-send-email-johannes.poehlmann@izt-labs.de> References: <1500982035-28838-1-git-send-email-johannes.poehlmann@izt-labs.de> In-Reply-To: <20170718141502.GA18857@kroah.com> References: <20170718141502.GA18857@kroah.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3417 Lines: 122 o Make endian clean, make HW-endianness configurable. o Use ioread*, iowrite* instead of __raw_readb,__raw_writeb to also use memory-barriers when accessing HW-registers. We do not want reordering to happen here. Both changes are tightly coupled, so I do them in one patch Signed-off-by: Johannes Poehlmann Acked-by: Evgeniy Polyakov --- drivers/w1/masters/ds1wm.c | 60 ++++++++++++++++++++++++++++++++++++++++++++-- include/linux/mfd/ds1wm.h | 5 ++++ 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/drivers/w1/masters/ds1wm.c b/drivers/w1/masters/ds1wm.c index 401e53e..d15575d 100644 --- a/drivers/w1/masters/ds1wm.c +++ b/drivers/w1/masters/ds1wm.c @@ -96,6 +96,7 @@ static struct { struct ds1wm_data { void __iomem *map; unsigned int bus_shift; /* # of shifts to calc register offsets */ + bool is_hw_big_endian; struct platform_device *pdev; const struct mfd_cell *cell; int irq; @@ -115,12 +116,65 @@ struct ds1wm_data { static inline void ds1wm_write_register(struct ds1wm_data *ds1wm_data, u32 reg, u8 val) { - __raw_writeb(val, ds1wm_data->map + (reg << ds1wm_data->bus_shift)); + if (ds1wm_data->is_hw_big_endian) { + switch (ds1wm_data->bus_shift) { + case 0: + iowrite8(val, ds1wm_data->map + (reg << 0)); + break; + case 1: + iowrite16be((u16)val, ds1wm_data->map + (reg << 1)); + break; + case 2: + iowrite32be((u32)val, ds1wm_data->map + (reg << 2)); + break; + } + } else { + switch (ds1wm_data->bus_shift) { + case 0: + iowrite8(val, ds1wm_data->map + (reg << 0)); + break; + case 1: + iowrite16((u16)val, ds1wm_data->map + (reg << 1)); + break; + case 2: + iowrite32((u32)val, ds1wm_data->map + (reg << 2)); + break; + } + } } static inline u8 ds1wm_read_register(struct ds1wm_data *ds1wm_data, u32 reg) { - return __raw_readb(ds1wm_data->map + (reg << ds1wm_data->bus_shift)); + u32 val = 0; + + if (ds1wm_data->is_hw_big_endian) { + switch (ds1wm_data->bus_shift) { + case 0: + val = ioread8(ds1wm_data->map + (reg << 0)); + break; + case 1: + val = ioread16be(ds1wm_data->map + (reg << 1)); + break; + case 2: + val = ioread32be(ds1wm_data->map + (reg << 2)); + break; + } + } else { + switch (ds1wm_data->bus_shift) { + case 0: + val = ioread8(ds1wm_data->map + (reg << 0)); + break; + case 1: + val = ioread16(ds1wm_data->map + (reg << 1)); + break; + case 2: + val = ioread32(ds1wm_data->map + (reg << 2)); + break; + } + } + dev_dbg(&ds1wm_data->pdev->dev, + "ds1wm_read_register reg: %d, 32 bit val:%x\n", reg, val); + return (u8)val; } @@ -499,6 +553,8 @@ static int ds1wm_probe(struct platform_device *pdev) return -EINVAL; } + ds1wm_data->is_hw_big_endian = plat->is_hw_big_endian; + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!res) return -ENXIO; diff --git a/include/linux/mfd/ds1wm.h b/include/linux/mfd/ds1wm.h index 79a01e8..2227c6a 100644 --- a/include/linux/mfd/ds1wm.h +++ b/include/linux/mfd/ds1wm.h @@ -16,6 +16,11 @@ struct ds1wm_driver_data { */ unsigned int reset_recover_delay; + /* Say 1 here for big endian Hardware + * (only relevant with bus-shift > 0 + */ + bool is_hw_big_endian; + /* left shift of register number to get register address offsett. * Only 0,1,2 allowed for 8,16 or 32 bit bus width respectively */ -- 2.1.4