Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1751658AbdGYLkv (ORCPT <rfc822;w@1wt.eu>);
        Tue, 25 Jul 2017 07:40:51 -0400
Received: from szxga03-in.huawei.com ([45.249.212.189]:9416 "EHLO
        szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S1751790AbdGYLkO (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Tue, 25 Jul 2017 07:40:14 -0400
From: Shaokun Zhang <zhangshaokun@hisilicon.com>
To: <mark.rutland@arm.com>, <will.deacon@arm.com>
CC: <jonathan.cameron@huawei.com>, <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>,
        <linuxarm@huawei.com>
Subject: [PATCH v4 1/6] Documentation: perf: hisi: Documentation for HiSilicon SoC PMU driver
Date: Tue, 25 Jul 2017 20:10:37 +0800
Message-ID: <1500984642-204676-2-git-send-email-zhangshaokun@hisilicon.com>
X-Mailer: git-send-email 1.9.1
In-Reply-To: <1500984642-204676-1-git-send-email-zhangshaokun@hisilicon.com>
References: <1500984642-204676-1-git-send-email-zhangshaokun@hisilicon.com>
MIME-Version: 1.0
Content-Type: text/plain
X-Originating-IP: [10.67.212.75]
X-CFilter-Loop: Reflected
X-Mirapoint-Virus-RAPID-Raw: score=unknown(0),
        refid=str=0001.0A020203.59772E1A.0039,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0,
        ip=0.0.0.0,
        so=2014-11-16 11:51:01,
        dmn=2013-03-21 17:37:32
X-Mirapoint-Loop-Id: 5ca71fac258f46466f24fef57cd362de
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
Content-Length: 3033
Lines: 70

This patch adds documentation for the uncore PMUs on HiSilicon SoC.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Signed-off-by: Anurup M <anurup.m@huawei.com>
---
 Documentation/perf/hisi-pmu.txt | 52 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)
 create mode 100644 Documentation/perf/hisi-pmu.txt

diff --git a/Documentation/perf/hisi-pmu.txt b/Documentation/perf/hisi-pmu.txt
new file mode 100644
index 0000000..f45a03d
--- /dev/null
+++ b/Documentation/perf/hisi-pmu.txt
@@ -0,0 +1,52 @@
+HiSilicon SoC uncore Performance Monitoring Unit (PMU)
+======================================================
+The HiSilicon SoC chip comprehends various independent system device PMUs
+such as L3 cache (L3C), Hydra Home Agent (HHA) and DDRC. These PMUs are
+independent and have hardware logic to gather statistics and performance
+information.
+
+HiSilicon SoC encapsulates multiple CPU and IO dies. Each CPU cluster
+(CCL) is made up of 4 cpu cores sharing one L3 cache; Each CPU die is
+called Super CPU cluster (SCCL) and is made up of 6 CCLs. Each SCCL has
+two HHAs (0 - 1) and four DDRCs (0 - 3), respectively.
+
+HiSilicon SoC uncore PMU driver
+---------------------------------------
+Each device PMU has separate registers for event counting, control and
+interrupt, and the PMU driver shall register perf PMU drivers like L3C,
+HHA and DDRC etc. The available events and configuration options shall
+be described in the sysfs, see /sys/devices/hisi_* or /sys/bus/
+event_source/devices/hisi_*.
+The "perf list" command shall list the available events from sysfs.
+
+Each L3C, HHA and DDRC in one SCCL are registered as an separate PMU with perf.
+The PMU name will appear in event listing as hisi_module <index-id>_<sccl-id>.
+where "index-id" is the index of module and "sccl-id" is the identifier of
+the SCCL.
+e.g. hisi_l3c0_1/rd_hit_cpipe is READ_HIT_CPIPE event of L3C index #0 and SCCL
+ID #1.
+e.g. hisi_hha0_1/rx_operations is RX_OPERATIONS event of HHA index #0 and SCCL
+ID #1.
+
+The driver also provides a "cpumask" sysfs attribute, which shows the CPU core
+ID used to count the uncore PMU event.
+
+Example usage of perf:
+$# perf list
+hisi_l3c0_3/rd_hit_cpipe/ [kernel PMU event]
+------------------------------------------
+hisi_l3c0_3/wr_hit_cpipe/ [kernel PMU event]
+------------------------------------------
+hisi_l3c0_1/rd_hit_cpipe/ [kernel PMU event]
+------------------------------------------
+hisi_l3c0_1/wr_hit_cpipe/ [kernel PMU event]
+------------------------------------------
+
+$# perf stat -a -e hisi_l3c0_1/rd_hit_cpipe/ sleep 5
+$# perf stat -a -e hisi_l3c0_1/config=0x02/ sleep 5
+
+The current driver does not support sampling. So "perf record" is unsupported.
+Also attach to a task is unsupported as the events are all uncore.
+
+Note: Please contact the maintainer for a complete list of events supported for
+the PMU devices in the SoC and its information if needed.
-- 
1.9.1