Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751367AbdGZHPJ (ORCPT ); Wed, 26 Jul 2017 03:15:09 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:39254 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750989AbdGZHPH (ORCPT ); Wed, 26 Jul 2017 03:15:07 -0400 MIME-Version: 1.0 In-Reply-To: <20170723102749.17323-6-icenowy@aosc.io> References: <20170723102749.17323-1-icenowy@aosc.io> <20170723102749.17323-6-icenowy@aosc.io> From: Chen-Yu Tsai Date: Wed, 26 Jul 2017 15:14:43 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [linux-sunxi] [PATCH 05/10] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change To: Icenowy Zheng Cc: Liam Girdwood , Mark Brown , Maxime Ripard , Chen-Yu Tsai , linux-kernel , devicetree , linux-arm-kernel , linux-clk , "open list:THERMAL" , linux-sunxi Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 521 Lines: 16 On Sun, Jul 23, 2017 at 6:27 PM, Icenowy Zheng wrote: > From: Chen-Yu Tsai > > This patch utilizes the new PLL clk notifier to gate then ungate the > PLL CPU clock after rate changes. This should prevent any system hangs > resulting from cpufreq changes to the clk. > > Reported-by: Ondrej Jirman > Signed-off-by: Chen-Yu Tsai > Tested-by: Icenowy Zheng This is missing Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks") ChenYu