Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751685AbdGZPpc (ORCPT ); Wed, 26 Jul 2017 11:45:32 -0400 Received: from mail-sn1nam02on0050.outbound.protection.outlook.com ([104.47.36.50]:53120 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751013AbdGZPp2 (ORCPT ); Wed, 26 Jul 2017 11:45:28 -0400 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Jan.Glauber@cavium.com; Date: Wed, 26 Jul 2017 17:45:15 +0200 From: Jan Glauber To: Borislav Petkov Cc: Suzuki K Poulose , Mark Rutland , Will Deacon , linux-arm-kernel@lists.infradead.org, "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters Message-ID: <20170726154515.GA11453@hc> References: <20170725150422.4775-1-jglauber@cavium.com> <20170725150422.4775-2-jglauber@cavium.com> <72145781-e9ec-036f-f752-b4756fef08ee@arm.com> <20170726111946.GA6273@hc> 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X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR07MB2585 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 768 Lines: 18 On Wed, Jul 26, 2017 at 05:35:02PM +0200, Borislav Petkov wrote: > On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote: > > I'm also looking for CPU implementor (MIDR), I could check for the model > > too but I still need to detect devices based on PCI IDs as the model > > check is not sufficient here (only multi-socket ThunderX has OCX TLK > > devices). > > So what does that mean? The only way to load a PMU driver and an EDAC > driver is the PCI ID of the memory controller? No other way? I already tried multiple ways to load the drivers, so far with limited success :) The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'. I'm not aware of other ways to access these devices. Please enlighten me if I'm missing something. --Jan