Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751597AbdGZRQn (ORCPT ); Wed, 26 Jul 2017 13:16:43 -0400 Received: from terminus.zytor.com ([65.50.211.136]:41751 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751562AbdGZRQk (ORCPT ); Wed, 26 Jul 2017 13:16:40 -0400 Date: Wed, 26 Jul 2017 10:13:28 -0700 From: tip-bot for Kan Liang Message-ID: Cc: peterz@infradead.org, kan.liang@intel.com, alexander.shishkin@linux.intel.com, tglx@linutronix.de, mingo@kernel.org, hpa@zytor.com, linux-kernel@vger.kernel.org, acme@redhat.com, jolsa@redhat.com, ak@linux.intel.com, adrian.hunter@intel.com Reply-To: kan.liang@intel.com, peterz@infradead.org, mingo@kernel.org, tglx@linutronix.de, alexander.shishkin@linux.intel.com, acme@redhat.com, linux-kernel@vger.kernel.org, hpa@zytor.com, adrian.hunter@intel.com, ak@linux.intel.com, jolsa@redhat.com In-Reply-To: <20170630141656.1626-2-kan.liang@intel.com> References: <20170630141656.1626-2-kan.liang@intel.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:perf/core] perf intel-pt: Always set no branch for dummy event Git-Commit-ID: 91a8c5b840f2da31280e14b6268761cf14033756 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2226 Lines: 56 Commit-ID: 91a8c5b840f2da31280e14b6268761cf14033756 Gitweb: http://git.kernel.org/tip/91a8c5b840f2da31280e14b6268761cf14033756 Author: Kan Liang AuthorDate: Fri, 30 Jun 2017 10:16:56 -0400 Committer: Arnaldo Carvalho de Melo CommitDate: Thu, 20 Jul 2017 09:55:51 -0300 perf intel-pt: Always set no branch for dummy event An earlier kernel patch allowed enabling PT and LBR at the same time on Goldmont. commit ccbebba4c6bf ("perf/x86/intel/pt: Bypass PT vs. LBR exclusivity if the core supports it") However, users still cannot use Intel PT and LBRs simultaneously. $ sudo perf record -e cycles,intel_pt//u -b -- sleep 1 Error: PMU Hardware doesn't support sampling/overflow-interrupts. PT implicitly adds dummy event in perf tool. dummy event is software event which doesn't support LBR. Always setting no branch for dummy event in Intel PT. Signed-off-by: Kan Liang Acked-by: Jiri Olsa Cc: Adrian Hunter Cc: Alexander Shishkin Cc: Andi Kleen Cc: Peter Zijlstra Link: http://lkml.kernel.org/r/20170630141656.1626-2-kan.liang@intel.com Signed-off-by: Arnaldo Carvalho de Melo --- tools/perf/arch/x86/util/intel-pt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c index 4a461e8..db0ba8c 100644 --- a/tools/perf/arch/x86/util/intel-pt.c +++ b/tools/perf/arch/x86/util/intel-pt.c @@ -701,6 +701,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, perf_evsel__set_sample_bit(switch_evsel, TID); perf_evsel__set_sample_bit(switch_evsel, TIME); perf_evsel__set_sample_bit(switch_evsel, CPU); + perf_evsel__reset_sample_bit(switch_evsel, BRANCH_STACK); opts->record_switch_events = false; ptr->have_sched_switch = 3; @@ -762,6 +763,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, /* And the CPU for switch events */ perf_evsel__set_sample_bit(tracking_evsel, CPU); } + perf_evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK); } /*