Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751776AbdG1Gqg (ORCPT ); Fri, 28 Jul 2017 02:46:36 -0400 Received: from lucky1.263xmail.com ([211.157.147.135]:37461 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751754AbdG1Gqe (ORCPT ); Fri, 28 Jul 2017 02:46:34 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: david.wu@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: david.wu@rock-chips.com X-UNIQUE-TAG: <13a1175857657a2a6fb892c92cb40321> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v2 05/11] net: stmmac: dwmac-rk: Add internal phy support To: Andrew Lunn Cc: davem@davemloft.net, heiko@sntech.de, f.fainelli@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, olof@lixom.net, linux@armlinux.org.uk, arnd@arndb.de, peppe.cavallaro@st.com, alexandre.torgue@st.com, huangtao@rock-chips.com, hwg@rock-chips.com, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <1501160156-30328-1-git-send-email-david.wu@rock-chips.com> <1501160540-30662-1-git-send-email-david.wu@rock-chips.com> <20170727134834.GD18666@lunn.ch> From: "David.Wu" Message-ID: <7764adcf-02c5-5ae1-1735-7f7e36790c30@rock-chips.com> Date: Fri, 28 Jul 2017 14:46:25 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <20170727134834.GD18666@lunn.ch> Content-Type: text/plain; charset=gbk; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 535 Lines: 13 Hi Andrew, ?? 2017/7/27 21:48, Andrew Lunn ะด??: > I think we need to discuss this. This PHY appears to be on an MDIO > bus, it uses a standard PHY driver, and it appears to be using an RMII > interface. So it is just an ordinary PHY. > > Internal is supposed to be something which is not ordinary, does not > use one of the standard phy modes, needs something special to make it > work. Yes, it is a ordinary PHY in fact, using MDIO bus, but it is a internal phy inside Soc, so the "internal" is not the internal as Florain said.