Date: Fri, 28 Jul 2017 16:25:08 +0200
From: Corentin Labbe <clabbe.montjoie@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: robh+dt@kernel.org, mark.rutland@arm.com,
        maxime.ripard@free-electrons.com, wens@csie.org, linux@armlinux.org.uk,
        peppe.cavallaro@st.com, alexandre.torgue@st.com,
        devicetree@vger.kernel.org, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
        linux-arm-kernel@lists.infradead.org, icenowy@aosc.io
Subject: Re: [PATCH 0/3] net-next: stmmac: support future possible different
 internal phy mode
Message-ID: <20170728142508.GA7221@Red>
References: <20170728092818.23419-1-clabbe.montjoie@gmail.com>
 <20170728135544.GD32230@lunn.ch>
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On Fri, Jul 28, 2017 at 03:55:44PM +0200, Andrew Lunn wrote:
> On Fri, Jul 28, 2017 at 11:28:15AM +0200, Corentin Labbe wrote:
> > Hello
> > 
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it will negate a possible future SoC where an external PHY use the
> > same phy mode than the internal one.
> > 
> > This patchs series adds a new way to find if the PHY is internal, via its
> > compatible.
> 
> http://elixir.free-electrons.com/linux/latest/source/drivers/of/of_mdio.c#L144
> 
> Since you also have "ethernet-phy-ieee802.3-c22", you won't get the
> warning. But still, your device tree gives the wrong idea.
> 
> I've probably asked this before: Does the internal PHY use a different
> PHY ID in registers 2 and 3?
> 

yes

reg2: 0x0044
reg3: 0X1500

Regards