Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753360AbdG2Dlb (ORCPT ); Fri, 28 Jul 2017 23:41:31 -0400 Received: from mailgw02.mediatek.com ([218.249.47.111]:36471 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753112AbdG2Dl1 (ORCPT ); Fri, 28 Jul 2017 23:41:27 -0400 Message-ID: <1501299671.12447.4.camel@mtkswgap22> Subject: Re: [PATCH 2/2] dt-bindings: ata: add DT bindings for MediaTek SATA controller From: Ryder Lee To: Sergei Shtylyov CC: Hans de Goede , Tejun Heo , "Rob Herring" , , , , , Long Cheng Date: Sat, 29 Jul 2017 11:41:11 +0800 In-Reply-To: <7adf5e2c-4678-3e91-1036-f5e82d23329f@cogentembedded.com> References: <45c7b2abc65b0d7b5b945763837811296e56835f.1501134896.git.ryder.lee@mediatek.com> <7adf5e2c-4678-3e91-1036-f5e82d23329f@cogentembedded.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1557 Lines: 39 On Fri, 2017-07-28 at 12:20 +0300, Sergei Shtylyov wrote: > > +Required properties: > > + - compatible : Must be "mediatek,ahci". > > + - reg : Physical base addresses and length of register sets. > > + - interrupts : Interrupt associated with the SATA device. > > + - interrupt-names : Associated name must be: "hostc". > > + - clocks : The phandle for the clock. > > Your example shows that you need both phandle and specifier (afetr phandle). > > > + - clock-names : Associated name must be: "ahb", "axi", "asic", "rbc", "pm" > > + - phys : The phandle for the PHY port. > > Likewise. Oh yeah, I forgot about that. > > + - phy-names : Associated name must be: "sata-phy". > > + - ports-implemented : Mask that indicates which ports that the HBA supports > > + are available for software to use. Useful if PORTS_IMPL > > + is not programmed by the BIOS, which is true with some > > + embedded SOC's. > > An empty line wouldn't hurt here... Okay. > > +Optional properties: > > + - power-domains : A phandle and power domain specifier pair to the power > > + domain which is responsible for collapsing and restoring > > + power to the peripheral. > > + - resets : Must contain an entry for each entry in reset-names. > > + See ../reset/reset.txt for details. > > + - reset-names : Associated names must be: "axi-rst", "sw-rst", "reg-rst". > > + - mediatek,phy-mode : A phandle to the system controller, used to enable > > + SATA function. Thanks! Ryder.