Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751375AbdGaFuP (ORCPT ); Mon, 31 Jul 2017 01:50:15 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:41530 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750916AbdGaFuM (ORCPT ); Mon, 31 Jul 2017 01:50:12 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org AED09608EA Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=vivek.gautam@codeaurora.org Subject: Re: [PATCH v5 2/7] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 To: Varadarajan Narayanan , bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, svarbanov@mm-sol.com, kishon@ti.com, sboyd@codeaurora.org, fengguang.wu@intel.com, weiyongjun1@huawei.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <1501479594-18285-1-git-send-email-varada@codeaurora.org> <1501479594-18285-3-git-send-email-varada@codeaurora.org> From: Vivek Gautam Message-ID: <55f7f87f-0302-c4a5-af9b-280c6c473943@codeaurora.org> Date: Mon, 31 Jul 2017 11:20:05 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1501479594-18285-3-git-send-email-varada@codeaurora.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2042 Lines: 51 On 07/31/2017 11:09 AM, Varadarajan Narayanan wrote: > IPQ8074 uses QMP phy controller that provides support to PCIe and > USB. Adding dt binding information for the same. > > Signed-off-by: Varadarajan Narayanan > --- Reviewed-by: Vivek Gautam > Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > index 5d7a51f..802af1b 100644 > --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > @@ -6,6 +6,7 @@ controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. > > Required properties: > - compatible: compatible list, contains: > + "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 > "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, > "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996. > > @@ -38,6 +39,8 @@ Required properties: > "phy", "common", "cfg". > For "qcom,msm8996-qmp-usb3-phy" must contain > "phy", "common". > + For "qcom,ipq8074-qmp-pcie-phy" must contain: > + "phy", "common". > > - vdda-phy-supply: Phandle to a regulator supply to PHY core block. > - vdda-pll-supply: Phandle to 1.8V regulator supply to PHY refclk pll block. > @@ -63,6 +66,11 @@ Required properties for child node: > - clock-output-names: Name of the phy clock that will be the parent for > the above pipe clock. > > + For "qcom,ipq8074-qmp-pcie-phy": > + - "pcie20_phy0_pipe_clk" Pipe Clock parent > + (or) > + "pcie20_phy1_pipe_clk" > + > - resets: a list of phandles and reset controller specifier pairs, > one for each entry in reset-names. > - reset-names: Must contain following for pcie qmp phys: -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project