Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752107AbdGaKKh (ORCPT ); Mon, 31 Jul 2017 06:10:37 -0400 Received: from regular1.263xmail.com ([211.150.99.131]:53305 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751708AbdGaKKe (ORCPT ); Mon, 31 Jul 2017 06:10:34 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Andy Yan To: heiko@sntech.de, linus.walleij@linaro.org Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-gpio@vger.kernel.org, Andy Yan Subject: [PATCH 03/14] pinctrl: rockchip: add input schmitt support for rv1108 Date: Mon, 31 Jul 2017 18:10:22 +0800 Message-Id: <1501495822-21503-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1501495449-21290-1-git-send-email-andy.yan@rock-chips.com> References: <1501495449-21290-1-git-send-email-andy.yan@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1904 Lines: 61 Some pins like i2c SCL/SDA need the schmitt input function to avoid crosstalk problems. Signed-off-by: Andy Yan --- drivers/pinctrl/pinctrl-rockchip.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index e831647..868cb9c 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -1084,6 +1084,36 @@ static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, *bit *= RV1108_DRV_BITS_PER_PIN; } +#define RV1108_SCHMITT_PMU_OFFSET 0x30 +#define RV1108_SCHMITT_GRF_OFFSET 0x388 +#define RV1108_SCHMITT_BANK_STRIDE 8 +#define RV1108_SCHMITT_PINS_PER_GRF_REG 16 +#define RV1108_SCHMITT_PINS_PER_PMU_REG 8 + +static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, + int pin_num, + struct regmap **regmap, + int *reg, u8 *bit) +{ + struct rockchip_pinctrl *info = bank->drvdata; + int pins_per_reg; + + if (bank->bank_num == 0) { + *regmap = info->regmap_pmu; + *reg = RV1108_SCHMITT_PMU_OFFSET; + pins_per_reg = RV1108_SCHMITT_PINS_PER_PMU_REG; + } else { + *regmap = info->regmap_base; + *reg = RV1108_SCHMITT_GRF_OFFSET; + pins_per_reg = RV1108_SCHMITT_PINS_PER_GRF_REG; + *reg += (bank->bank_num - 1) * RV1108_SCHMITT_BANK_STRIDE; + } + *reg += ((pin_num / pins_per_reg) * 4); + *bit = pin_num % pins_per_reg; + + return 0; +} + #define RK2928_PULL_OFFSET 0x118 #define RK2928_PULL_PINS_PER_REG 16 #define RK2928_PULL_BANK_STRIDE 8 @@ -3017,6 +3047,7 @@ static struct rockchip_pin_ctrl rv1108_pin_ctrl = { .pmu_mux_offset = 0x0, .pull_calc_reg = rv1108_calc_pull_reg_and_bit, .drv_calc_reg = rv1108_calc_drv_reg_and_bit, + .schmitt_calc_reg = rv1108_calc_schmitt_reg_and_bit, }; static struct rockchip_pin_bank rk2928_pin_banks[] = { -- 2.7.4