Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752035AbdHALDm (ORCPT ); Tue, 1 Aug 2017 07:03:42 -0400 Received: from mail-oi0-f41.google.com ([209.85.218.41]:32947 "EHLO mail-oi0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751804AbdHALDj (ORCPT ); Tue, 1 Aug 2017 07:03:39 -0400 MIME-Version: 1.0 In-Reply-To: <20170731125920.GX5176@cbox> References: <1500397144-16232-1-git-send-email-jintack.lim@linaro.org> <1500397144-16232-39-git-send-email-jintack.lim@linaro.org> <20170731125920.GX5176@cbox> From: Jintack Lim Date: Tue, 1 Aug 2017 07:03:35 -0400 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFC PATCH v2 38/38] KVM: arm64: Respect the virtual CPTR_EL2.TCPAC setting To: Christoffer Dall Cc: kvmarm@lists.cs.columbia.edu, Christoffer Dall , Marc Zyngier , Jonathan Corbet , Paolo Bonzini , =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , linux@armlinux.org.uk, Catalin Marinas , Will Deacon , akpm@linux-foundation.org, mchehab@kernel.org, cov@codeaurora.org, Daniel Lezcano , david.daney@cavium.com, mark.rutland@arm.com, Suzuki K Poulose , stefan@hello-penguin.com, Andy Gross , wcohen@redhat.com, Ard Biesheuvel , shankerd@codeaurora.org, vladimir.murzin@arm.com, james.morse@arm.com, linux-doc@vger.kernel.org, lkml - Kernel Mailing List , KVM General , arm-mail-list Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1895 Lines: 55 Hi Christoffer, On Mon, Jul 31, 2017 at 8:59 AM, Christoffer Dall wrote: > On Tue, Jul 18, 2017 at 11:59:04AM -0500, Jintack Lim wrote: >> Forward CPACR_EL1 traps to the virtual EL2 if virtual CPTR_EL2 is >> configured to trap CPACR_EL1 accesses from EL1. >> >> This is for recursive nested virtualization. >> >> Signed-off-by: Jintack Lim >> --- >> arch/arm64/kvm/sys_regs.c | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c >> index 6f67666..ba2966d 100644 >> --- a/arch/arm64/kvm/sys_regs.c >> +++ b/arch/arm64/kvm/sys_regs.c >> @@ -1091,6 +1091,11 @@ static bool access_cpacr(struct kvm_vcpu *vcpu, >> if (el12_reg(p) && forward_nv_traps(vcpu)) >> return kvm_inject_nested_sync(vcpu, kvm_vcpu_get_hsr(vcpu)); >> >> + /* Forward this trap to the virtual EL2 if CPTR_EL2.TCPAC is set*/ >> + if (!el12_reg(p) && !vcpu_mode_el2(vcpu) && >> + (vcpu_sys_reg(vcpu, CPTR_EL2) & CPTR_EL2_TCPAC)) >> + return kvm_inject_nested_sync(vcpu, kvm_vcpu_get_hsr(vcpu)); >> + > > I'm trying to understand what should happen if the VM is in EL1 and > accesses CPACR_EL12, but the guest hypervisor did not set > CPTR_EL2.TCPAC, why would we get here, and if there's a good reason why I guess what you meant is HCR_EL2.NV bit? > we god here, is the EL12 access not supposed to undef at EL1 as opposed > to actually work, like it seems your code does when it doesn't take the > branch? IIUC, we need to have this logic if (el12_reg() && virtual HCR_EL2.NV == 0) inject_undef(); This is a good point, and should be applied for all traps controlled by NV bit. > >> /* >> * When the virtual HCR_EL2.E2H == 1, an access to CPACR_EL1 >> * in the virtual EL2 is to access CPTR_EL2. >> -- >> 1.9.1 >> > > Thanks, > -Christoffer