Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751940AbdHARIj (ORCPT ); Tue, 1 Aug 2017 13:08:39 -0400 Received: from mail.kernel.org ([198.145.29.99]:45578 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751860AbdHARIi (ORCPT ); Tue, 1 Aug 2017 13:08:38 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 94E3D22CB6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=robh@kernel.org MIME-Version: 1.0 From: Rob Herring Date: Tue, 1 Aug 2017 12:08:14 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v7 04/15] irqchip: RISC-V Local Interrupt Controller Driver To: Palmer Dabbelt Cc: peterz@infradead.org, tglx@linutronix.de, jason@lakedaemon.net, Marc Zyngier , Arnd Bergmann , yamada.masahiro@socionext.com, mmarek@suse.com, albert@sifive.com, Will Deacon , boqun.feng@gmail.com, oleg@redhat.com, mingo@redhat.com, Daniel Lezcano , Greg Kroah-Hartman , jslaby@suse.com, davem@davemloft.net, mchehab@kernel.org, hverkuil@xs4all.nl, rdunlap@infradead.org, viro@zeniv.linux.org.uk, mhiramat@kernel.org, fweisbec@gmail.com, mcgrof@kernel.org, dledford@redhat.com, bart.vanassche@sandisk.com, sstabellini@kernel.org, mpe@ellerman.id.au, rmk+kernel@armlinux.org.uk, paul.gortmaker@windriver.com, nicolas.dichtel@6wind.com, linux@roeck-us.net, heiko.carstens@de.ibm.com, schwidefsky@de.ibm.com, geert@linux-m68k.org, Andrew Morton , andriy.shevchenko@linux.intel.com, jiri@mellanox.com, vgupta@synopsys.com, airlied@redhat.com, jk@ozlabs.org, chris@chris-wilson.co.uk, Jason@zx2c4.com, Paul McKenney , ncardwell@google.com, Linux Kernel Mailing List , linux-kbuild@vger.kernel.org, patches@groups.riscv.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 654 Lines: 17 On Mon, Jul 31, 2017 at 7:59 PM, Palmer Dabbelt wrote: > This patch adds a driver that manages the local interrupts on each > RISC-V hart, as specifiec by the RISC-V supervisor level ISA manual. > The local interrupt controller manages software interrupts, timer > interrupts, and hardware interrupts (which are routed via the > platform level interrupt controller). Per-hart local interrupt > controllers are found on all RISC-V systems. > > Signed-off-by: Palmer Dabbelt > --- > +IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init); What happened with the DT bindings? Those need to come first. Rob