Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751975AbdHBDzh (ORCPT ); Tue, 1 Aug 2017 23:55:37 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:51486 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751727AbdHBDzf (ORCPT ); Tue, 1 Aug 2017 23:55:35 -0400 MIME-Version: 1.0 In-Reply-To: <20170729141753.20174-12-codekipper@gmail.com> References: <20170729141753.20174-1-codekipper@gmail.com> <20170729141753.20174-12-codekipper@gmail.com> From: Chen-Yu Tsai Date: Wed, 2 Aug 2017 11:55:11 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [linux-sunxi] [PATCH v3 11/12] ASoC: sun4i-i2s: Update global enable with bitmask To: Code Kipper Cc: Maxime Ripard , linux-arm-kernel , linux-sunxi , Liam Girdwood , Mark Brown , linux-kernel , Linux-ALSA , "Andrea Venturi (pers)" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 509 Lines: 14 On Sat, Jul 29, 2017 at 10:17 PM, wrote: > From: Marcus Cooper > > The default value of the config register is different on newer > SoCs and therefore enabling/disabling with a register write > will clear bits used to set the direction of the clock and frame > pins. > > Signed-off-by: Marcus Cooper Reviewed-by: Chen-Yu Tsai This patch looks like it could be applied directly without any of the other preceding patches?