Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752093AbdHCCEj (ORCPT ); Wed, 2 Aug 2017 22:04:39 -0400 Received: from regular1.263xmail.com ([211.150.99.135]:34700 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751188AbdHCCEg (ORCPT ); Wed, 2 Aug 2017 22:04:36 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: xxm@rock-chips.com X-FST-TO: joro@8bytes.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: xxm@rock-chips.com X-UNIQUE-TAG: <22f84b54b70a7f99553bdd438f329db7> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Simon Xue To: Joerg Roedel , Heiko Stuebner Cc: Rob Herring , Mark Rutland , linux-rockchip@lists.infradead.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Simon Xue Subject: [PATCH] ARM: dts: rockchip: rk3288 add more iommu nodes Date: Thu, 3 Aug 2017 10:04:03 +0800 Message-Id: <1501725843-37391-1-git-send-email-xxm@rock-chips.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1716 Lines: 65 Add IEP/ISP/VPU/HEVC iommu nodes Signed-off-by: Simon Xue --- arch/arm/boot/dts/rk3288.dtsi | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2484f11..90646a2 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -953,6 +953,25 @@ status = "okay"; }; + iep_mmu: iommu@ff900800 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff900800 0x0 0x40>; + interrupts = ; + interrupt-names = "iep_mmu"; + #iommu-cells = <0>; + status = "disabled"; + }; + + isp_mmu: iommu@ff914000 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; + interrupts = ; + interrupt-names = "isp_mmu"; + #iommu-cells = <0>; + rockchip,disable-mmu-reset; + status = "disabled"; + }; + vopb: vop@ff930000 { compatible = "rockchip,rk3288-vop"; reg = <0xff930000 0x19c>; @@ -1126,6 +1145,24 @@ }; }; + vpu_mmu: iommu@ff9a0800 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff9a0800 0x0 0x100>; + interrupts = ; + interrupt-names = "vpu_mmu"; + #iommu-cells = <0>; + status = "disabled"; + }; + + hevc_mmu: iommu@ff9c0440 { + compatible = "rockchip,iommu"; + reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>; + interrupts = ; + interrupt-names = "hevc_mmu"; + #iommu-cells = <0>; + status = "disabled"; + }; + gpu: mali@ffa30000 { compatible = "rockchip,rk3288-mali", "arm,mali-t760", "arm,mali-midgard"; reg = <0xffa30000 0x10000>; -- 1.9.1