Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751258AbdHCHcI (ORCPT ); Thu, 3 Aug 2017 03:32:08 -0400 Received: from mail-oi0-f50.google.com ([209.85.218.50]:36193 "EHLO mail-oi0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751062AbdHCHcG (ORCPT ); Thu, 3 Aug 2017 03:32:06 -0400 MIME-Version: 1.0 In-Reply-To: <1500618435-15092-3-git-send-email-david.wu@rock-chips.com> References: <1500618435-15092-1-git-send-email-david.wu@rock-chips.com> <1500618435-15092-3-git-send-email-david.wu@rock-chips.com> From: Linus Walleij Date: Thu, 3 Aug 2017 09:32:04 +0200 Message-ID: Subject: Re: [PATCH 2/2] pinctrl: rockchip: Add rk3128 pinctrl support To: David Wu Cc: =?UTF-8?Q?Heiko_St=C3=BCbner?= , Tao Huang , Doug Anderson , "open list:ARM/Rockchip SoC..." , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 365 Lines: 12 On Fri, Jul 21, 2017 at 8:27 AM, David Wu wrote: > There are 3 IP blocks pin routes need to be switched, that are > emmc-cmd, spi, i2s. And there are some pins need to be recalced, > which are gpio2c4~gpio2c7 and gpio2d0. > > Signed-off-by: David Wu Patch applied with Heiko's review tag. Yours, Linus Walleij