Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751988AbdHCWPv (ORCPT ); Thu, 3 Aug 2017 18:15:51 -0400 Received: from mail.kernel.org ([198.145.29.99]:47914 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751599AbdHCWPu (ORCPT ); Thu, 3 Aug 2017 18:15:50 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 29A1122BE3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=helgaas@kernel.org Date: Thu, 3 Aug 2017 17:15:46 -0500 From: Bjorn Helgaas To: honghui.zhang@mediatek.com Cc: bhelgaas@google.com, robh@kerenl.org, robh+dt@kernel.org, matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, yingjoe.chen@mediatek.com, eddie.huang@mediatek.com, ryder.lee@mediatek.com, hongkun.cao@mediatek.com, youlin.pei@mediatek.com, yong.wu@mediatek.com, yt.shen@mediatek.com, sean.wang@mediatek.com, xinping.qian@mediatek.com Subject: Re: [PATCH v2 1/5] PCI: mediatek: Add a structure to abstract the controller generations Message-ID: <20170803221546.GL20308@bhelgaas-glaptop.roam.corp.google.com> References: <948f9bd0881402d13e6913ad425e7dff50f3fcfc.1501122135.git.honghui.zhang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <948f9bd0881402d13e6913ad425e7dff50f3fcfc.1501122135.git.honghui.zhang@mediatek.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 598 Lines: 13 On Thu, Jul 27, 2017 at 10:58:35AM +0800, honghui.zhang@mediatek.com wrote: > From: Ryder Lee > > Introduce a structure "mtk_pcie_soc" to abstract the differences between > controller generations, and the .startup() hook is used to encapsulate > some SoC-dependent related setting. In doing so, the common code which > will be reused by future chips. > > In addition, we change the approaches to waiting Gen2 training by using > readl_poll_timeout() calls. Please split the Gen2 training change to a separate patch, since that's not related to the mtk_pcie_soc changes.