Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752005AbdHCXEs (ORCPT ); Thu, 3 Aug 2017 19:04:48 -0400 Received: from mail.kernel.org ([198.145.29.99]:50856 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751791AbdHCXEq (ORCPT ); Thu, 3 Aug 2017 19:04:46 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 97DE222C95 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=helgaas@kernel.org Date: Thu, 3 Aug 2017 18:04:44 -0500 From: Bjorn Helgaas To: Varadarajan Narayanan Cc: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, svarbanov@mm-sol.com, kishon@ti.com, sboyd@codeaurora.org, vivek.gautam@codeaurora.org, fengguang.wu@intel.com, weiyongjun1@huawei.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: Re: [PATCH v6 1/7] dt-bindings: phy: qmp: Add output-clock-names Message-ID: <20170803230444.GQ20308@bhelgaas-glaptop.roam.corp.google.com> References: <1501482857-14100-1-git-send-email-varada@codeaurora.org> <1501482857-14100-2-git-send-email-varada@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1501482857-14100-2-git-send-email-varada@codeaurora.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1636 Lines: 42 On Mon, Jul 31, 2017 at 12:04:11PM +0530, Varadarajan Narayanan wrote: > The phy outputs a clock that will act as the parent for > the phy's pipe clock. Add the name of this clock to the s/phy/PHY/ > lane's DT node. > > Acked-by: Rob Herring > Signed-off-by: Varadarajan Narayanan > --- > Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > index e11c563..5d7a51f 100644 > --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > @@ -60,6 +60,8 @@ Required properties for child node: > one for each entry in clock-names. > - clock-names: Must contain following for pcie and usb qmp phys: > "pipe" for pipe clock specific to each lane. > + - clock-output-names: Name of the phy clock that will be the parent for > + the above pipe clock. s/phy/PHY/ (this file is a hodge-podge so I guess this isn't making it much worse) > > - resets: a list of phandles and reset controller specifier pairs, > one for each entry in reset-names. > @@ -96,6 +98,7 @@ Example: > > clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; > clock-names = "pipe0"; > + clock-output-names = "pcie_0_pipe_clk_src"; > resets = <&gcc GCC_PCIE_0_PHY_BCR>; > reset-names = "lane0"; > }; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation >