Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751335AbdHDEME (ORCPT ); Fri, 4 Aug 2017 00:12:04 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:36642 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751272AbdHDEKq (ORCPT ); Fri, 4 Aug 2017 00:10:46 -0400 MIME-Version: 1.0 In-Reply-To: References: <20170723102749.17323-1-icenowy@aosc.io> <20170723102749.17323-7-icenowy@aosc.io> From: Chen-Yu Tsai Date: Fri, 4 Aug 2017 12:10:22 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [linux-sunxi] [PATCH 06/10] clk: sunxi-ng: allow set parent clock (PLL_CPUX) for CPUX clock on H3 To: Chen-Yu Tsai Cc: Icenowy Zheng , Liam Girdwood , Mark Brown , Maxime Ripard , linux-kernel , devicetree , linux-arm-kernel , linux-clk , "open list:THERMAL" , linux-sunxi Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 636 Lines: 16 On Mon, Jul 24, 2017 at 11:10 AM, Chen-Yu Tsai wrote: > On Sun, Jul 23, 2017 at 6:27 PM, Icenowy Zheng wrote: >> The CPUX clock, which is the main clock of the ARM core on Allwinner H3, >> can be adjusted by changing the frequency of the PLL_CPUX clock. >> >> Allowing setting parent clock for the CPUX clock, thus the PLL_CPUX >> clock can be adjusted when adjusting the CPUX clock. >> >> Signed-off-by: Icenowy Zheng > > Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks") > Reviewed-by: Chen-Yu Tsai Applied for 4.14 with the Fixes tag and Stephen's ack. ChenYu