Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751921AbdHDHxJ convert rfc822-to-8bit (ORCPT ); Fri, 4 Aug 2017 03:53:09 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:50582 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751278AbdHDHxH (ORCPT ); Fri, 4 Aug 2017 03:53:07 -0400 Date: Fri, 4 Aug 2017 09:53:05 +0200 From: Boris Brezillon To: Abhishek Sahu Cc: dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, richard@nod.at, cyrille.pitchen@wedev4u.fr, robh+dt@kernel.org, mark.rutland@arm.com, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, andy.gross@linaro.org, architt@codeaurora.org, sricharan@codeaurora.org Subject: Re: [PATCH v2 00/25] Add QCOM QPIC NAND support Message-ID: <20170804095305.6492a2d3@bbrezillon> In-Reply-To: <1500464893-11352-1-git-send-email-absahu@codeaurora.org> References: <1500464893-11352-1-git-send-email-absahu@codeaurora.org> X-Mailer: Claws Mail 3.13.2 (GTK+ 2.24.30; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2183 Lines: 52 Hi Abhishek, On Wed, 19 Jul 2017 17:17:48 +0530 Abhishek Sahu wrote: > v2: > > 1. Addressed the review comments given in v1 > 2. Removed the DMA coherent buffer for register read and used > streaming DMA API’s > 3. Reorganized the NAND read and write functions > 4. Separated patch for driver and documentation changes > 5. Changed the compatible string for EBI2 > > v1: > > http://www.spinics.net/lists/devicetree/msg183706.html > > Abhishek Sahu (25): > mtd: nand: qcom: fix config error for BCH > mtd: nand: qcom: program NAND_DEV_CMD_VLD register > mtd: nand: qcom: change compatible string for EBI2 NANDC > dt-bindings: qcom_nandc: change compatible string for EBI2 NANDC > mtd: nand: qcom: remove redundant chip select compatible string > dt-bindings: qcom_nandc: remove chip select compatible string > mtd: nand: qcom: reorganize nand page read > mtd: nand: qcom: reorganize nand page write > mtd: nand: qcom: remove memset for clearing read register buffer > mtd: nand: qcom: reorganize nand devices probing > mtd: nand: qcom: support for NAND controller properties > dt-bindings: qcom_nandc: QPIC NAND documentation > mtd: nand: qcom: add QPIC NAND compatible string > mtd: nand: qcom: add and initialize QPIC DMA resources > mtd: nand: qcom: DMA mapping support for register read buffer > mtd: nand: qcom: allocate BAM transaction > mtd: nand: qcom: add BAM DMA descriptor handling > mtd: nand: qcom: support for passing flags in transfer functions > mtd: nand: qcom: support for read location registers > mtd: nand: qcom: erased codeword detection configuration > mtd: nand: qcom: support for QPIC page read/write > mtd: nand: qcom: QPIC raw write support > mtd: nand: qcom: change register offset defines with enums > dt-bindings: qcom_nandc: compatible string for version 1.5.0 > mtd: nand: qcom: support for QPIC version 1.5.0 Applied patch 1 and 5 to 11 to nand/next [1]. > > .../devicetree/bindings/mtd/qcom_nandc.txt | 56 +- > drivers/mtd/nand/qcom_nandc.c | 1157 ++++++++++++++++---- > 2 files changed, 1010 insertions(+), 203 deletions(-) >