Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752581AbdHEMcg (ORCPT ); Sat, 5 Aug 2017 08:32:36 -0400 Received: from mail-it0-f51.google.com ([209.85.214.51]:33158 "EHLO mail-it0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752140AbdHEMcf (ORCPT ); Sat, 5 Aug 2017 08:32:35 -0400 MIME-Version: 1.0 In-Reply-To: <20170804214944.3910-1-graeme.gregory@linaro.org> References: <20170804214944.3910-1-graeme.gregory@linaro.org> From: "Rafael J. Wysocki" Date: Sat, 5 Aug 2017 14:32:33 +0200 X-Google-Sender-Auth: OzS21nR_BT1O1zXXD6q4DPbWehc Message-ID: Subject: Re: [PATCH 0/2] Updated SPCR quirks for Moonshot/Mustang To: ACPI Devel Maling List Cc: Linux Kernel Mailing List , "Rafael J. Wysocki" , Len Brown , Loc Ho , Greg Kroah-Hartman , Graeme Gregory , Jon Masters Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 635 Lines: 13 On Fri, Aug 4, 2017 at 11:49 PM, Graeme Gregory wrote: > A couple of patches to build on the SPCR quirks support already upstreamed. > > 1 - Moonshot m400 cartridge has the same soc but ACPI tables have different > HPe specific headers so extend quirk to understand those too. > > 2 - Relevant vendors do not seem to be working on DBG2/SPCR update for > situation where the clock is unknown. We want these machines to boot with > console initialised from SPCR before I die of old age so use the previous > quirk handling to also handle the clock problem as well. Anyone any objections against this series?