Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751920AbdHGBq6 (ORCPT ); Sun, 6 Aug 2017 21:46:58 -0400 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:49948 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751800AbdHGBqx (ORCPT ); Sun, 6 Aug 2017 21:46:53 -0400 From: Chris Packham To: robh+dt@kernel.org, gregory.clement@free-electrons.com, bp@alien8.de, jlu@pengutronix.de, linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Chris Packham , Mauro Carvalho Chehab Subject: [RESEND PATCH 4/4] EDAC: add support for reduced-width Armada-XP SDRAM Date: Mon, 7 Aug 2017 13:46:41 +1200 Message-Id: <20170807014641.4003-5-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170807014641.4003-1-chris.packham@alliedtelesis.co.nz> References: <20170807014641.4003-1-chris.packham@alliedtelesis.co.nz> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 935 Lines: 25 Some integrated Armada XP SoCs use a reduced pin count so the width of the SDRAM interface is smaller than the traditional discrete SoCs. This means that the definition of "full" and "half" width is further reduced. Signed-off-by: Chris Packham --- drivers/edac/armada_xp_edac.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/edac/armada_xp_edac.c b/drivers/edac/armada_xp_edac.c index 68e88b180928..d8edcaac87c0 100644 --- a/drivers/edac/armada_xp_edac.c +++ b/drivers/edac/armada_xp_edac.c @@ -350,6 +350,9 @@ static int armada_xp_mc_edac_probe(struct platform_device *pdev) if (armada_xp_mc_edac_read_config(mci)) return -EINVAL; + if (of_property_read_bool(pdev->dev.of_node, "marvell,reduced-width")) + drvdata->width /= 2; + /* configure SBE threshold */ /* it seems that SBEs are not captured otherwise */ writel(1 << SDRAM_ERR_CTRL_ERR_THR_OFFSET, -- 2.13.0