Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751972AbdHGCdq (ORCPT ); Sun, 6 Aug 2017 22:33:46 -0400 Received: from regular1.263xmail.com ([211.150.99.130]:36723 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751409AbdHGCdp (ORCPT ); Sun, 6 Aug 2017 22:33:45 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: kever.yang@rock-chips.com X-FST-TO: linux-arm-kernel@lists.infradead.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: kever.yang@rock-chips.com X-UNIQUE-TAG: <46f0a1bd1c93ebee3264875eed12404d> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH] RM: dts: rockchip: rk322x: add spi node and spi pinctrl To: Huibin Hong , sofia-kernel.list@rock-chips.com References: <1502070311-19663-1-git-send-email-huibin.hong@rock-chips.com> Cc: huangtao@rock-chips.com, Mark Rutland , Heiko Stuebner , Russell King , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org From: Kever Yang Message-ID: <7b4b3bce-e467-51ae-3295-20933c85e6ef@rock-chips.com> Date: Mon, 7 Aug 2017 10:33:15 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <1502070311-19663-1-git-send-email-huibin.hong@rock-chips.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2385 Lines: 94 Hi Huibing, Does this patch suppose to be V3? and there is a typo in subject. Thanks, - Kever On 08/07/2017 09:45 AM, Huibin Hong wrote: > Add spi node and spi pinctrl for rk322x > > Signed-off-by: Huibin Hong > --- > > arch/arm/boot/dts/rk322x.dtsi | 50 +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > > diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi > index f3e4ffd..1a7afef 100644 > --- a/arch/arm/boot/dts/rk322x.dtsi > +++ b/arch/arm/boot/dts/rk322x.dtsi > @@ -55,6 +55,7 @@ > serial0 = &uart0; > serial1 = &uart1; > serial2 = &uart2; > + spi0 = &spi0; > }; > > cpus { > @@ -361,6 +362,19 @@ > status = "disabled"; > }; > > + spi0: spi@11090000 { > + compatible = "rockchip,rk3228-spi"; > + reg = <0x11090000 0x1000>; > + interrupts = ; > + #address-cells = <1>; > + #size-cells = <0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>; > + clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; > + clock-names = "spiclk", "apb_pclk"; > + status = "disabled"; > + }; > + > wdt: watchdog@110a0000 { > compatible = "snps,dw-wdt"; > reg = <0x110a0000 0x100>; > @@ -797,6 +811,42 @@ > }; > }; > > + spi-0 { > + spi0_clk: spi0-clk { > + rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_up>; > + }; > + spi0_cs0: spi0-cs0 { > + rockchip,pins = <0 14 RK_FUNC_2 &pcfg_pull_up>; > + }; > + spi0_tx: spi0-tx { > + rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>; > + }; > + spi0_rx: spi0-rx { > + rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>; > + }; > + spi0_cs1: spi0-cs1 { > + rockchip,pins = <1 12 RK_FUNC_1 &pcfg_pull_up>; > + }; > + }; > + > + spi-1 { > + spi1_clk: spi1-clk { > + rockchip,pins = <0 23 RK_FUNC_2 &pcfg_pull_up>; > + }; > + spi1_cs0: spi1-cs0 { > + rockchip,pins = <2 2 RK_FUNC_2 &pcfg_pull_up>; > + }; > + spi1_rx: spi1-rx { > + rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_up>; > + }; > + spi1_tx: spi1-tx { > + rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_up>; > + }; > + spi1_cs1: spi1-cs1 { > + rockchip,pins = <2 3 RK_FUNC_2 &pcfg_pull_up>; > + }; > + }; > + > i2s1 { > i2s1_bus: i2s1-bus { > rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,