Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752075AbdHGW5y (ORCPT ); Mon, 7 Aug 2017 18:57:54 -0400 Received: from gloria.sntech.de ([95.129.55.99]:51860 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751775AbdHGW5x (ORCPT ); Mon, 7 Aug 2017 18:57:53 -0400 From: Heiko Stuebner To: Andy Yan Cc: robh+dt@kernel.org, shawn.lin@rock-chips.com, zhangqing@rock-chips.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mturquette@baylibre.com, sboyd@codeaurora.org, linux-rockchip@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 06/23] clk: rockchip: support more clks for rv1108 Date: Tue, 08 Aug 2017 00:57:45 +0200 Message-ID: <11738434.oWbxbgkgjP@phil> User-Agent: KMail/5.2.3 (Linux/4.9.0-2-amd64; KDE/5.28.0; x86_64; ; ) In-Reply-To: <1501662837-12029-1-git-send-email-andy.yan@rock-chips.com> References: <1501662303-11687-1-git-send-email-andy.yan@rock-chips.com> <1501662837-12029-1-git-send-email-andy.yan@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1507 Lines: 41 Hi Andy, Am Mittwoch, 2. August 2017, 16:33:57 CEST schrieb Andy Yan: > From: Elaine Zhang > > Added the description of the missing clock, > make the clock tree more complete. > > Signed-off-by: Elaine Zhang > Signed-off-by: Andy Yan [...] > FACTOR(0, "xin12m", "xin24m", 0, 1, 2), > > - COMPOSITE(0, "i2s0_src", mux_pll_src_2plls_p, 0, > + /* PD_BUS */ > + GATE(0, "aclk_bus_src_gpll", "gpll", CLK_IGNORE_UNUSED, > + RV1108_CLKGATE_CON(1), 0, GFLAGS), > + GATE(0, "aclk_bus_src_apll", "apll", CLK_IGNORE_UNUSED, > + RV1108_CLKGATE_CON(1), 1, GFLAGS), > + GATE(0, "aclk_bus_src_dpll", "dpll", CLK_IGNORE_UNUSED, > + RV1108_CLKGATE_CON(1), 2, GFLAGS), > + COMPOSITE_NOGATE(ACLK_PRE, "aclk_bus_pre", mux_aclk_bus_src_p, 0, > + RV1108_CLKSEL_CON(2), 8, 2, MFLAGS, 0, 5, DFLAGS), > + COMPOSITE_NOMUX(HCLK_BUS, "hclk_bus_pre", "aclk_bus_pre", 0, > + RV1108_CLKSEL_CON(3), 0, 5, DFLAGS, > + RV1108_CLKGATE_CON(1), 4, GFLAGS), you're adding a (new / second) hclk_bus_pre here, but only drop the old in patch 7. Please structure patch-contents in a way that each patch is self-contained and works on its own ... aka the clock tree should not get worse if only patch 6 is applied (like in a random git bisect), but here the state is bad between these 2 patches. hclk_bus_pre also is only _one_ example and there are probably more of those hiding in these clock patches. So please fix these issues. Thanks Heiko