Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752170AbdHHLNJ (ORCPT ); Tue, 8 Aug 2017 07:13:09 -0400 Received: from mail-dm3nam03on0065.outbound.protection.outlook.com ([104.47.41.65]:60207 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752098AbdHHLNC (ORCPT ); Tue, 8 Aug 2017 07:13:02 -0400 Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=xilinx.com; windriver.com; dkim=none (message not signed) header.d=none;windriver.com; dmarc=bestguesspass action=none header.from=xilinx.com; From: Ravi Shankar Jonnalagadda To: , , , , , , , , , , , , Subject: [PATCH 2/4] PCI:xilinx-nwl: Correcting Styling checks Date: Tue, 8 Aug 2017 16:42:17 +0530 Message-ID: <1502190739-13474-3-git-send-email-vjonnal@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1502190739-13474-1-git-send-email-vjonnal@xilinx.com> References: <1502190739-13474-1-git-send-email-vjonnal@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.1.0.1062-23244.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(39840400002)(39450400003)(39860400002)(39400400002)(39850400002)(39410400002)(2980300002)(438002)(189002)(199003)(6666003)(36386004)(103686004)(42186005)(2950100002)(50466002)(626005)(36756003)(38730400002)(63266004)(45336002)(33646002)(52956003)(76176999)(2201001)(189998001)(5003940100001)(46386002)(106466001)(48376002)(50986999)(50226002)(8676002)(6266002)(2906002)(5660300001)(81156014)(356003)(305945005)(47776003)(90966002)(8936002)(81166006)(478600001)(107986001)(921003)(1121003)(2101003)(83996005);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1PR0201MB1772;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;PTR:unknown-60-83.xilinx.com;MX:1;A:1;LANG:en; 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i < nr_irqs; i++) { irq_domain_set_info(domain, virq + i, bit + i, &nwl_irq_chip, - domain->host_data, handle_simple_irq, - NULL, NULL); + domain->host_data, handle_simple_irq, + NULL, NULL); } mutex_unlock(&msi->lock); return 0; } static void nwl_irq_domain_free(struct irq_domain *domain, unsigned int virq, - unsigned int nr_irqs) + unsigned int nr_irqs) { struct irq_data *data = irq_domain_get_irq_data(domain, virq); struct nwl_pcie *pcie = irq_data_get_irq_chip_data(data); @@ -767,7 +767,6 @@ static int nwl_pcie_bridge_init(struct nwl_pcie *pcie) /* Enable all misc interrupts */ nwl_bridge_writel(pcie, MSGF_MISC_SR_MASKALL, MSGF_MISC_MASK); - /* Disable all legacy interrupts */ nwl_bridge_writel(pcie, (u32)~MSGF_LEG_SR_MASKALL, MSGF_LEG_MASK); @@ -932,4 +931,5 @@ static struct platform_driver nwl_pcie_driver = { }, .probe = nwl_pcie_probe, }; + builtin_platform_driver(nwl_pcie_driver); -- 2.1.1