Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752589AbdHICBW (ORCPT ); Tue, 8 Aug 2017 22:01:22 -0400 Received: from mail-pg0-f67.google.com ([74.125.83.67]:37515 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752301AbdHICBU (ORCPT ); Tue, 8 Aug 2017 22:01:20 -0400 From: SZ Lin Cc: SZ Lin , Rob Herring , Mark Rutland , Russell King , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC Date: Wed, 9 Aug 2017 09:59:09 +0800 Message-Id: <20170809015909.12969-1-sz.lin@moxa.com> X-Mailer: git-send-email 2.14.0 To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1024 Lines: 35 Add QSPI node support, and this function is disabled by default This setting could be overwritten in board-level definitions Signed-off-by: SZ Lin --- arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 7bb9df2c1460..9da876e47810 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -154,6 +154,20 @@ big-endian; }; + qspi: quadspi@1550000 { + compatible = "fsl,ls1021a-qspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x1550000 0x0 0x10000>, + <0x0 0x40000000 0x0 0x40000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; + interrupts = ; + clock-names = "qspi_en", "qspi"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>; + big-endian; + status = "disabled"; + }; + esdhc: esdhc@1560000 { compatible = "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; -- 2.14.0