Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753743AbdHIPsu (ORCPT ); Wed, 9 Aug 2017 11:48:50 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:43644 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752404AbdHIPss (ORCPT ); Wed, 9 Aug 2017 11:48:48 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 455EE60134 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=nleeder@codeaurora.org Cc: nleeder@codeaurora.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Langsdorf , Mark Salter , Jon Masters , Timur Tabi , Mark Brown , Lorenzo Pieralisi , Robin Murphy Subject: Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support To: Hanjun Guo , Will Deacon , Mark Rutland References: <1501876754-1064-1-git-send-email-nleeder@codeaurora.org> <394bd3b8-2583-01fa-02d3-6a49c2a6a6c0@linaro.org> From: "Leeder, Neil" Message-ID: <3eac1295-dba2-ad79-d868-b538b13de91a@codeaurora.org> Date: Wed, 9 Aug 2017 11:48:45 -0400 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: <394bd3b8-2583-01fa-02d3-6a49c2a6a6c0@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1389 Lines: 43 Hi Hanjun, On 8/9/2017 3:56 AM, Hanjun Guo wrote: > Hi Neil, > > On 2017/8/5 3:59, Neil Leeder wrote: >> This adds a driver for the SMMUv3 PMU into the perf framework. >> It includes an IORT update to support PM Counter Groups. >> >> IORT has no mechanism for determining device names so PMUs >> are named based on their physical address. >> >> Tested on Qualcomm QDF2400. perf_fuzzer ran for 4+ hours >> with no failures. >> >> Neil Leeder (2): >> acpi: arm64: add iort support for PMCG >> perf: add arm64 smmuv3 pmu driver >> >> drivers/acpi/arm64/iort.c | 54 +++ > > I would like to be Cced for next version. I will. I apologise for not including all the interested parties on this patchset. > >> drivers/perf/Kconfig | 9 + >> drivers/perf/Makefile | 1 + >> drivers/perf/arm_smmuv3_pmu.c | 823 ++++++++++++++++++++++++++++++++++++++++++ >> include/acpi/actbl2.h | 9 +- > > Do you have the acpica support code? I'm currently > working on SMMUv3 MSI support and I would like to test > it with MSI support for PMCG as well. I don't have any code other than what was posted here. What additional ACPICA support code is needed? Neil -- Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.