Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752900AbdHISPk (ORCPT ); Wed, 9 Aug 2017 14:15:40 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:57544 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752855AbdHISPh (ORCPT ); Wed, 9 Aug 2017 14:15:37 -0400 From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Pierre-Louis Bossart , Bard Liao , Mark Brown , Sasha Levin Subject: [PATCH 4.9 74/93] ASoC: rt5645: set sel_i2s_pre_div1 to 2 Date: Wed, 9 Aug 2017 11:14:07 -0700 Message-Id: <20170809181338.671751694@linuxfoundation.org> X-Mailer: git-send-email 2.14.0 In-Reply-To: <20170809181335.658857427@linuxfoundation.org> References: <20170809181335.658857427@linuxfoundation.org> User-Agent: quilt/0.65 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1368 Lines: 40 4.9-stable review patch. If anyone has any objections, please let me know. ------------------ From: Bard Liao [ Upstream commit 02c5c03283c52157d336abf5e44ffcda10579fbf ] The i2s clock pre-divider 1 is used for both i2s1 and sysclk. The i2s1 is usually used for the main i2s and the pre-divider will be set in hw_params function. However, if i2s2 is used, the pre-divider is not set in the hw_params function and the default value of i2s clock pre-divider 1 is too high for sysclk and DMIC usage. Fix by overriding default divider value to 2. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=95681 Tested-by: Pierre-Louis Bossart Signed-off-by: Bard Liao Signed-off-by: Mark Brown Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman --- sound/soc/codecs/rt5645.c | 3 +++ 1 file changed, 3 insertions(+) --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c @@ -3833,6 +3833,9 @@ static int rt5645_i2c_probe(struct i2c_c } } + regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1, + RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2); + if (rt5645->pdata.jd_invert) { regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2, RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);