Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751417AbdHJFFS (ORCPT ); Thu, 10 Aug 2017 01:05:18 -0400 Received: from mail-qt0-f194.google.com ([209.85.216.194]:37436 "EHLO mail-qt0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750735AbdHJFFQ (ORCPT ); Thu, 10 Aug 2017 01:05:16 -0400 MIME-Version: 1.0 In-Reply-To: <1502226769-5670-1-git-send-email-dsmythies@telus.net> References: <1502226769-5670-1-git-send-email-dsmythies@telus.net> From: Len Brown Date: Thu, 10 Aug 2017 01:05:15 -0400 X-Google-Sender-Auth: _r6rAmjT-RxbQL3j53Ynn6aKxks Message-ID: Subject: Re: [PATCH] cpufreq: x86: Disable interrupts during MSRs reading To: Doug Smythies Cc: X86 ML , Linux PM list , "Brown, Len" , Doug Smythies , "Rafael J. Wysocki" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1600 Lines: 52 thanks, Doug! Rafael, Reviewed-by: Len Brown On Tue, Aug 8, 2017 at 5:12 PM, Doug Smythies wrote: > According to Intel 64 and IA-32 Architectures SDM, Volume 3, > Chapter 14.2, "Software needs to exercise care to avoid delays > between the two RDMSRs (for example interrupts)". > > So, disable interrupts during reading MSRs IA32_APERF and IA32_MPERF. > > See also: > commit 4ab60c3f32c721e46217e762bcd3e55a8f659c04 > cpufreq: intel_pstate: Disable interrupts during MSRs reading > > Signed-off-by: Doug Smythies > --- > arch/x86/kernel/cpu/aperfmperf.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/x86/kernel/cpu/aperfmperf.c b/arch/x86/kernel/cpu/aperfmperf.c > index 7cf7c70..0ee8332 100644 > --- a/arch/x86/kernel/cpu/aperfmperf.c > +++ b/arch/x86/kernel/cpu/aperfmperf.c > @@ -40,13 +40,16 @@ static void aperfmperf_snapshot_khz(void *dummy) > struct aperfmperf_sample *s = this_cpu_ptr(&samples); > ktime_t now = ktime_get(); > s64 time_delta = ktime_ms_delta(now, s->time); > + unsigned long flags; > > /* Don't bother re-computing within the cache threshold time. */ > if (time_delta < APERFMPERF_CACHE_THRESHOLD_MS) > return; > > + local_irq_save(flags); > rdmsrl(MSR_IA32_APERF, aperf); > rdmsrl(MSR_IA32_MPERF, mperf); > + local_irq_restore(flags); > > aperf_delta = aperf - s->aperf; > mperf_delta = mperf - s->mperf; > -- > 2.7.4 > -- Len Brown, Intel Open Source Technology Center