Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752696AbdHKIWi (ORCPT ); Fri, 11 Aug 2017 04:22:38 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:37098 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751873AbdHKIWf (ORCPT ); Fri, 11 Aug 2017 04:22:35 -0400 MIME-Version: 1.0 In-Reply-To: <20170811081920.GB25147@Red> References: <20170810085129.20463-1-clabbe.montjoie@gmail.com> <20170810085129.20463-3-clabbe.montjoie@gmail.com> <20170811080543.GA25147@Red> <20170811081920.GB25147@Red> From: Chen-Yu Tsai Date: Fri, 11 Aug 2017 16:22:11 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/3] ARM: sun8i: sunxi-h3-h5: add phy-is-integrated property to internal PHY To: Corentin Labbe Cc: Chen-Yu Tsai , Rob Herring , Mark Rutland , Russell King , Maxime Ripard , Giuseppe Cavallaro , alexandre.torgue@st.com, Andrew Lunn , Florian Fainelli , netdev , devicetree , linux-kernel , linux-arm-kernel Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2313 Lines: 58 On Fri, Aug 11, 2017 at 4:19 PM, Corentin Labbe wrote: > On Fri, Aug 11, 2017 at 04:11:13PM +0800, Chen-Yu Tsai wrote: >> On Fri, Aug 11, 2017 at 4:05 PM, Corentin Labbe >> wrote: >> > On Fri, Aug 11, 2017 at 10:42:51AM +0800, Chen-Yu Tsai wrote: >> >> Hi, >> >> >> >> On Thu, Aug 10, 2017 at 4:51 PM, Corentin Labbe >> >> wrote: >> >> > This patch add the new phy-is-integrated property to the internal PHY >> >> > node. >> >> > >> >> > Signed-off-by: Corentin Labbe >> >> > --- >> >> > arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 + >> >> > 1 file changed, 1 insertion(+) >> >> > >> >> > diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi >> >> > index 4b599b5d26f6..54fc24e4c569 100644 >> >> > --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi >> >> > +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi >> >> > @@ -425,6 +425,7 @@ >> >> > reg = <1>; >> >> > clocks = <&ccu CLK_BUS_EPHY>; >> >> > resets = <&ccu RST_BUS_EPHY>; >> >> > + phy-is-integrated; >> >> >> >> You also need to "delete" this property at the board level for >> >> any board that has the external PHY at address <1>. Otherwise >> >> they will stop working. This is due to the internal and external >> >> PHYs having the same path and node name in the device tree, so >> >> they are effectively the same node. >> >> >> >> ChenYu >> >> >> > >> > They have not the same name, ext_rgmii_phy vs int_mii_phy. >> >> That is just the label. The label plays no part in device tree merging. The path >> >> /soc/ethernet@1c30000/mdio/ethernet-phy@1 >> >> is the same. You can look under >> >> /proc/device-tree/soc/ethernet@1c30000/mdio >> >> on the OrangePI Plus 2E or any other H3 board that uses an >> external PHY at address 1. >> >> ChenYu > > Since we get the phy node by phy-handle and not by path, I think all should be good. You are not getting me. The fact that the two seemingly separate nodes are merged together means, whatever properties you put in the internal PHY node, also affect the external PHY node. Once compiled, they are the SAME node.