Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752649AbdHKKLT (ORCPT ); Fri, 11 Aug 2017 06:11:19 -0400 Received: from mga06.intel.com ([134.134.136.31]:2408 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751618AbdHKKLR (ORCPT ); Fri, 11 Aug 2017 06:11:17 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,357,1498546800"; d="scan'208";a="888954421" Date: Fri, 11 Aug 2017 15:38:52 +0530 From: Rajneesh Bhardwaj To: Andy Shevchenko Cc: Rushikesh S Kadam , Mika Westerberg , "Krogerus, Heikki" , Linus Walleij , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Thomas Gleixner , Andy Shevchenko , "Rafael J. Wysocki" Subject: Re: [PATCH] pinctrl: intel: Disable GPIO pin interrupts in suspend Message-ID: <20170811100851.GA18657@raj-desk2.iind.intel.com> References: <1502439824-18733-1-git-send-email-rushikesh.s.kadam@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2690 Lines: 65 On Fri, Aug 11, 2017 at 12:57:26PM +0300, Andy Shevchenko wrote: > On Fri, Aug 11, 2017 at 11:23 AM, Rushikesh S Kadam > wrote: > > The fix prevents unintended wakes from second level GPIO pin interrupts. > > > > On some Intel Kabylake platforms, it is observed that GPIO pin interrupts > > can wake the platform from suspend-to-idle, even though the IRQ is not > > configured as IRQF_NO_SUSPEND or enable_irq_wake(). > > > > This can cause undesired wakes on Mobile devices such as Laptops and > > Chromebook devices. For example a headset jack insertion is not a desired > > wake source on Chromebook devices. > > > > The pinctrl-intel (GPIO controller) driver implements a "Shared IRQ" model. > > All GPIO pin interrupts are OR'ed and mapped to a first level IRQ14 (or > > IRQ15). The driver registers an irq_chip struct and maps an irq_domain for > > the GPIO pin interrupts. The IRQ14 handler demuxes and calls the second > > level IRQ for the respective pin. > > > > In the suspend entry flow, at suspend_noirq stage, the kernel disables IRQs > > that are not marked for wake. The pinctrl-intel driver does not implement a > > irq_disable() callback (to take advantage of lazy disabling). The > > pinctrl-intel GPIO interrupts are not disabled in hardware during suspend > > entry, and thus are able to wake the SoC out of suspend-to-idle. > > > > This patch sets the IRQCHIP_MASK_ON_SUSPEND flag for the GPIO irq_chip, to > > disable the second level interrupts at suspend_noirq stage via the irq_mask > > callbacks. The irq_mask callback disables the IRQs in hardware by > > programming the corresponding GPIO pad registers. Only IRQs that are not > > marked for wake are disabled. > > > > Signed-off-by: Rushikesh S Kadam > > Reviewed-by: Andy Shevchenko Reviewed-and-tested-by: Rajneesh Bhardwaj > > > --- > > drivers/pinctrl/intel/pinctrl-intel.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c > > index 6dc1096..8f87215 100644 > > --- a/drivers/pinctrl/intel/pinctrl-intel.c > > +++ b/drivers/pinctrl/intel/pinctrl-intel.c > > @@ -1035,6 +1035,7 @@ static irqreturn_t intel_gpio_irq(int irq, void *data) > > .irq_unmask = intel_gpio_irq_unmask, > > .irq_set_type = intel_gpio_irq_type, > > .irq_set_wake = intel_gpio_irq_wake, > > + .flags = IRQCHIP_MASK_ON_SUSPEND, > > }; > > > > static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq) > > -- > > 1.9.1 > > > > > > -- > With Best Regards, > Andy Shevchenko --