Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753450AbdHOHUo (ORCPT ); Tue, 15 Aug 2017 03:20:44 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:62419 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753109AbdHOHUj (ORCPT ); Tue, 15 Aug 2017 03:20:39 -0400 From: Fabien Dessenne To: Herbert Xu , "David S . Miller" , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre Torgue , , , , CC: Benjamin Gaignard , Lionel Debieve , Ludovic Barre Subject: [PATCH v2 2/3] dt-bindings: Document STM32 CRYP bindings Date: Tue, 15 Aug 2017 09:19:43 +0200 Message-ID: <1502781584-18468-3-git-send-email-fabien.dessenne@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1502781584-18468-1-git-send-email-fabien.dessenne@st.com> References: <1502781584-18468-1-git-send-email-fabien.dessenne@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.251.17.222] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-08-15_04:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1148 Lines: 36 Document device tree bindings for the STM32 CRYP. Signed-off-by: Fabien Dessenne --- .../devicetree/bindings/crypto/st,stm32-cryp.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt b/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt new file mode 100644 index 0000000..7c6d599 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt @@ -0,0 +1,20 @@ +* STMicroelectronics STM32 CRYP + +Required properties: +- compatible: Should be "st,stm32f756-cryp". +- reg: The address and length of the peripheral registers space +- clocks: The input clock of the CRYP instance +- interrupts: The CRYP interrupt + +Optional properties: +- resets: The input reset of the CRYP instance + +Example: +cryp1: cryp@50060000 { + compatible = "st,stm32f756-cryp"; + reg = <0x50060000 0x400>; + interrupts = <79>; + clocks = <&rcc 0 STM32F7_AHB2_CLOCK(CRYP)>; + resets = <&rcc STM32F7_AHB2_RESET(CRYP)>; + status = "disabled"; +}; -- 2.7.4